Pin names

You need to assign Net Aliases to override the default, N<nnnnn>, net names - Place>Net Alias from the menu.

Oldmouldy - I think you're taking about a PCB tool, not Virtuoso.

I responded to this question by email a couple of days ago, but I think there's a problem with email responses right now (I'm just reporting that). Here's what I said:

If for example you're simulating a testbench for the symbol, (I think) the nets attached to the pins will not take the names of the pins, you have to label them (press l, enter the name, click on the net). If you are descend editing the symbol then trying to plot the net, it should have the name of the net so long as its attached to a pin.

oldmouldy,how can I do it?

Andrew Beckett

Which simulator interface you're using (spectre, hspiceD, whatever)?

spectre

Which version of the tools you're using

5.10.41

What the names appear as in the ADE output pane.

Where you see the "net names in numeral".

What objects are you selecting on the schematic (are they pins, nets or instances).

They are colored.

I want see output pane like this.

OK, this is because you've not labelled the nets, and hence it is automatically naming them.

In the schematic editor, if you go to Options->Editor and then the "Net Names" tab, change the "Net Name Method" to "derived". This will cause automatically named nets to be "instance_pin" form - based on the name of the output pin that is driving the net.

This can be set in your ~/.cdsenv file by default as:

 schematic netNameMethod cyclic "derived"

or in your .cdsinit as:

  envSetVal("schematic" "netNameMethod" 'cyclic "derived")

So the nets were NOT numeric - they were "netNNN" - if you'd have said that in the first place, we'd have got there a lot more quickly!

Regards,

Andrew.

 Andrew Beckett, thanks.

 But I have another question.

http://www.cadence.com/Community/forums/p/15756/62266.aspx#62266