Stats

  • Locked Locked
  • Replies 6
  • Subscribers 126
  • Views 15250
  • Members are here 0
This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

ASSURA LVS PROBLEM FOR AMI C5 PDK

CHECKMATE

Hello,

I designed a simple inverter circuit and was testing the new AMI C5 PDK I received from MOSIS.

I ran the design rule check using assura and it worked fine and ir gave me no DRC errors.

Then when I ran the LVS using assura. I added the correct extract file and the correct bind.rul file and ran the LVS and it works fine.My schematic and Layout matches.

 But when I ran the LVS using assura having added the correct extract file, the correct compare rule file and the correct bind.rul file.It gives me the following error:

"Error - netlisting (dfII "....") rule can not be used with other schematic netlist rules.

*ERROR* encountered while reading avCompareRules.

 *ERROR* Syntax errors in file '/home/jhasan/AMI_C5/LVS_RUN/TEST.rsf'

Note I am running it on ASSURA version 3.1

This is the compare.rul file I received from MOSIS for the AMI C5 PDK:

 ;#####
; avCompareRules (AMIS Technology Development)
; $AMI/tech/common/current/assura/compare.rul (AMIS)
; 03/26/2002 Updated BRD
; 04/20/2002  DAS  Fixed path to box.cdl
; 04/22/2002  BRD  Restored path to box.cdl
; 05/15/2002  BRD  noMerge series caps, merge parallel
; 07/08/2002  BRD  added back bind.rul
; 09/05/2002  BRD  added swapPins for caps
; 09/13/2002  BRD  added filterDevices for presistor and pcapacitor
;                  to filter from schematics
; 10/16/2002  BRD  Set bind.rul path from beta to current
; 11/06/2002  BRD  added ls,ml,om,qo swapPins
; 12/18/2002  BRD  changed compare percents to 0.5 from 0.005
;                  added pdiode filter
; 01/08/2003  DBM  Jake tested the changes to follow.  
;           added cdl versions of pdiode and pcap
;           added commented out versions of a filter
;           statment and bindfile as well as the
;           listXRef() and upped the autoPinSwap().  
;                  
;
;#####
avCompareRules(
schematic( netlist( cdl strcat(getShellEnvVar("AMI") "/tech/ami500hakx/current/cdl/box.cdl" ) )
   swapPins("pp" nil)
   swapPins("cn" nil)
   swapPins("cp" nil)
   swapPins("ls" nil)
   swapPins("ml" nil)
   swapPins("om" nil)
   swapPins("qo" nil)
   genericDevice("cnvar")
   genericDevice("dschottky")
   genericDevice("esq")
   genericDevice("thru")
   genericDevice("ext")
   genericDevice("probe")
   genericDevice("v5")
   genericDevice("v12")
   genericDevice("v20")
   genericDevice("v40")
   filterDevice("presistor" short("PLUS" "MINUS"))
   filterDevice("pcapacitor")
   filterDevice("pdiode")
   filterDevice("CP")
   filterDevice("DP")
)

  mergeSplitGate( sameOrder )

  mergeParallel( MOS merge )
  mergeParallel( RES merge )
  mergeParallel( CAP merge )
  mergeParallel( BJT merge )
  mergeParallel( LDD merge )

  mergeSeries( MOS merge )
  mergeSeries( BJT noMerge )
;  mergeSeries( RES noMerge )
  mergeSeries( RES merge )
  mergeSeries( CAP noMerge )
  mergeSeries( LDD merge )

  compareParameter( MOS percent( "w" 0.05 "l" 0.05 ) )
  compareParameter( RES percent( "VALUE" 0.05 ) )
  compareParameter( BJT percent( "EA" 0.05 ) )
  compareParameter( CAP percent( "VALUE" 0.05 ) )
  compareParameter( LDD percent( "w" 0.05 "l" 0.05 ) )

  listXRef()
  listFilteredDevices()
  filterReduceStatistics()
  formGate(none)
  autoPinSwap( t 1000000)
  bindingFile( strcat(getShellEnvVar("AMI") "/tech/ami500hakx/current/assura/bind.rul" ))
;  filter( "BCOFGPX")
;  bindingFile( "lvs.bind")
) ; end of avCompareRules (AMIS Technology Development)

 

Please let me know how I can solve this bug in assura.

Thanks

Parents

  • Hi checkmate

    When running using DFII schematics, we cannot have both "dfII" and "cdl" inputs in the avCompareRules section. If you check your rsf file using the "View rsf" button on the lvs form, you should be able to find something similar to:

    avCompareRules(
       schematic( cdl ".../box.cdl")
       ...
    )
    ...
    avCompareRules(
       schematic( dfII ".../yourDesign.vlr")
       ...
    )

    Your current files are good for running Assura using cdl/verilog inputs. Here is how you can resolve the problem:
    a. Comment out the line in following line in compare rules using a semi-colon. E.g.
    ;schematic( netlist( cdl strcat(getShellEnvVar("AMI") "/tech/ami500hakx/current/cdl/box.cdl" ) )

    b. In the lvs form, press the "Netlisting Options" button. A form appears, at the end of the form, there is a field for adding cdl netlists. Please add "box.cdl" file using this form.

    c. Now run lvs. It should be ok now. If you examine the "design.vlr" file in the run directory, you should see something similar:

    avSimName = "auLvs"
    avDisableWildcardPG = nil
    avLibName  = "myLib"
    avCellName = "myDesign"
    avViewName = "schematic"
    avViewList = "auLvs schematic symbol"
    avStopList = "auLvs"
    avVldbFile = "/myPath/avLVS/myDesign.sdb"
    avReadCDL( "/myPath/box.cdl" )

    By the way, if it is possible, please upgrade to the latest version of Assura. Assura31 is too out-dated. : )

    Best regards
    Quek

Reply

  • Hi checkmate

    When running using DFII schematics, we cannot have both "dfII" and "cdl" inputs in the avCompareRules section. If you check your rsf file using the "View rsf" button on the lvs form, you should be able to find something similar to:

    avCompareRules(
       schematic( cdl ".../box.cdl")
       ...
    )
    ...
    avCompareRules(
       schematic( dfII ".../yourDesign.vlr")
       ...
    )

    Your current files are good for running Assura using cdl/verilog inputs. Here is how you can resolve the problem:
    a. Comment out the line in following line in compare rules using a semi-colon. E.g.
    ;schematic( netlist( cdl strcat(getShellEnvVar("AMI") "/tech/ami500hakx/current/cdl/box.cdl" ) )

    b. In the lvs form, press the "Netlisting Options" button. A form appears, at the end of the form, there is a field for adding cdl netlists. Please add "box.cdl" file using this form.

    c. Now run lvs. It should be ok now. If you examine the "design.vlr" file in the run directory, you should see something similar:

    avSimName = "auLvs"
    avDisableWildcardPG = nil
    avLibName  = "myLib"
    avCellName = "myDesign"
    avViewName = "schematic"
    avViewList = "auLvs schematic symbol"
    avStopList = "auLvs"
    avVldbFile = "/myPath/avLVS/myDesign.sdb"
    avReadCDL( "/myPath/box.cdl" )

    By the way, if it is possible, please upgrade to the latest version of Assura. Assura31 is too out-dated. : )

    Best regards
    Quek

Children
No Data

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.