Stats

  • Locked Locked
  • Replies 6
  • Subscribers 125
  • Views 18040
  • Members are here 0
This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

some strange layout error

tester

Dear All,

The DRC test has been passed with no errors. However, there are a few area still have flashing x sign. For instance, the portion of metal 1 extended from the source of PMOS, which overlaps vdd (metal 1 as well) has flashing x sign. Can anyone give me some hint please?

Thanks

 

 

 

Parents

  • I thought I'd answered this, but couldn't see it. Anyway, the message you're getting is almost certainly from Layout XL. Did you try running LVS - DRC wouldn't show the error.

    Anyway, to upload the picture, hit the Reply button (not the quick reply) and then go onto the Options tab which gives you the ability to upload an attachment.

    Regards,

    Andrew.

     

Reply

  • I thought I'd answered this, but couldn't see it. Anyway, the message you're getting is almost certainly from Layout XL. Did you try running LVS - DRC wouldn't show the error.

    Anyway, to upload the picture, hit the Reply button (not the quick reply) and then go onto the Options tab which gives you the ability to upload an attachment.

    Regards,

    Andrew.

     

Children
No Data

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.