Stats

  • Locked Locked
  • Replies 11
  • Subscribers 125
  • Views 17972
  • Members are here 0
This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

How to build a standard cell model (for a printed transistor) in Cadence

write2rammy

Hallo,

        I have the model equations for a printed transistor (Quite different from BSIM3 and EKV models). Now I need to use this model in Cadence to simulate circuits. So when I place a nmos the simulator should use this model instead of BSIM3 or EKV.. I guess I can't model this using Verilog-A because I am not intending to do a behavioral modelling.

Parents

  • Whilst we've done a lot of optimization for VerilogA models representing compact device models, typically I wouldn't expect them to be as fast as a model written in C. I recall seeing figures of a factor of 2 speed difference (although your mileage may vary), and it depends on the number of other devices in the circuit, and so on (and very much on how well the model is written).

    So my point was that if you have a very large number of devices (tens of thousands, say, or more), then you may need the performance improvement gained by writing in C. However, we do have some large customers that have their own transistor models (e.g. variants of bsim3v3) and use these all the time.

    Regards,

    Andrew.

Reply

  • Whilst we've done a lot of optimization for VerilogA models representing compact device models, typically I wouldn't expect them to be as fast as a model written in C. I recall seeing figures of a factor of 2 speed difference (although your mileage may vary), and it depends on the number of other devices in the circuit, and so on (and very much on how well the model is written).

    So my point was that if you have a very large number of devices (tens of thousands, say, or more), then you may need the performance improvement gained by writing in C. However, we do have some large customers that have their own transistor models (e.g. variants of bsim3v3) and use these all the time.

    Regards,

    Andrew.

Children
No Data

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.