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  3. How to build a standard cell model (for a printed transistor...

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How to build a standard cell model (for a printed transistor) in Cadence

write2rammy
write2rammy over 15 years ago

Hallo,

        I have the model equations for a printed transistor (Quite different from BSIM3 and EKV models). Now I need to use this model in Cadence to simulate circuits. So when I place a nmos the simulator should use this model instead of BSIM3 or EKV.. I guess I can't model this using Verilog-A because I am not intending to do a behavioral modelling.

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  • Andrew Beckett
    Andrew Beckett over 15 years ago

    Now I'm confused. If you have a SPICE model file, you can use that directly in spectre (no need to translate the format as spectre can read SPICE syntax directly).

    I thought you said you had a set of equations - if so, that's not a SPICE model file. Iwas suggesting a solution to implement a model using that set of equations.

    Regards,

    Andrew.

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  • Andrew Beckett
    Andrew Beckett over 15 years ago

    Now I'm confused. If you have a SPICE model file, you can use that directly in spectre (no need to translate the format as spectre can read SPICE syntax directly).

    I thought you said you had a set of equations - if so, that's not a SPICE model file. Iwas suggesting a solution to implement a model using that set of equations.

    Regards,

    Andrew.

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