Porting Layout is Virtuoso Layout to Encounter

Hi Nick

If you are using IC61, the openAccess database can be shared with Encounter so you can open the layout directly in Encounter. You can first generate an abstract view of your design using Abstract Generator. If you are using IC5141, you can use Abstract Generator to generate an abstract view and then export it as a LEF file. The LEF file can then be used as input to Encounter.

Best regards
Quek

 Hey Quek thanks a lot I will look into Abstract Generator .... I use IC5141 so I need to go through LEF generation business ....

Thanks for your response

Regards

Nick

Hi, I have the same problem, but i'm working with cadence IC61.

I read the documentation and, as far as i understood, I can generate an abstract view of the top level block to be imported on encounter for further place and root operations. The idea is to provide encounter some infos about pin placement of the module.

I tried to run the abstract generator in library mode (i can't run it in cellview mode), but i can't understand if the generated abstract is correct or not as when i open it it is covered by a blue layer.

I also opened encounter to try to import the generated abstract (whether it was correct or not) but I failed this operation too.

Kind regards

Gian Nicola

Hi Gian Nicola

I think the blue layer that covers the block is a cover blockage which you had generated in "abstract" step of the abstract generator. If you do not want blockages to cover the entire block, you can generate "detail" blockages.

It would be good if you can start a new thread with your question. : )

Best regards
Quek

 Hi quek

I finally created the abstract, with correct pins and i've imported it in encounter.

However My analog cell is not a rectagle as i left some space in a "cut"  where the digital part as to be placed.

Do you know how to force the blockage layer to be open in that area? 

regards

Gian Nicola

Hi Gian Nicola

Suppose your analog design is an L shape and you would like to put the digital portion in the empty portion of the L shape. In layout editor, you can simply create an L shape PR boundary layer using "Create->P&R Objects->PR Boundary" and select "cover" blockages for the metal layers during "Abstract" step. You will then get L shape blockages.


Best regards
Quek

Hi Quek,

I am confusing with generating LEF in IC614 for my cell layouts for the P&R purpose. I notice that File->Export->LEF can simply generate LEF for cells without complicated steps as Abstract Generator. But by reading the LEF file it seems that the tech process infomation is not included, but only some layout geometry information like "width" and "spacing". I guess this file is not readable in SoC encounter (now called EDI?). So is AG the only way to generate necessary file for P&R tool? Actually I am having trouble on starting AG. Some errors in the log said like:

 ERROR     (ABS-216): There are insufficient metal layers defined in the current design. You must define at least two metal layers in the validLayers subsection of LEFDefaultRouteSpec  constraint group of the technology file. These layers must have the layer function "metal" in the functions section. Update the technology file and attach it again.

Hi bjbit

Just a gentle reminder not to append to the thread of other users. In future, would you please kindly post a new thread for your own question?

You can refer to "Technology File Requirements" section in $CDSHOME/doc/abstract/abstract.pdf. It has a very detail explanation on the requirements of the Virtuoso techfile. I suspect that you do not have any constraint groups in the techfile.

Best regards
Quek

Hi bjbit

No problem. Starting a new thread will allow other users to only focus on your problem and hence be able to give better solutions to your issue. : )


Best regards
Quek