Import Verilog

Hi, Don't know if this query was raised before here. I am new to doing "Import ==> Verilog" in Cadence Virtuoso. I am having a gate level Verilog netlist and was trying to do Import==> Verilog function through Cadence Virtuoso(icfb). I am getting the import to work but unfortunately the reference dfII library which i am using for "component" symbols have VDD and VSS pins in their symbols. After import I am seeing that these ports are unconnected in the schematic view(as there are no VDD/VSS definition in the verilog netlist). Is there a way to have these pins connected after import? Thanks in advance.