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incorrect extraction issue

kristen
I am working with Virtuoso version IC6.1.3.500.13 and mentor 2011 (also have access to older versions and have previously used 2009). The pdk I am working with apparently has a known bug (confirmed by the foundry) such that the extracted transistors are always incorrect - instead of a 10 finger fet with total width 8um, for example, the tool extracts 10 transistors, 1 finger each, EACH with a width of 8 um. does anyone have any suggestions on how to manually fix this so i can run simulations on the extracted circuits using the config view? I have tried 1. manually editing the calibre view to ensure the correct width for each fet - i then get the error Error (OSSHNL-109) : the cell view, [name of calibre view], has been modified since the extraction. Re-extract the design (File->Check and Save menu option) for schematic cell views to correct this error. 2. copying and pasting extracted circuit to a schematic view - i then get the error ERROR (ADE-6026): Unable to create the netlist due to failure of the following operating system command "cat: ihnl/cds1/netlist: No such file or directory". Thanks.
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  • Quek

    Hi Kristen

    It is possible to run into problems only when generating extracted views and not spectre or spice netlists. This is because when generating extracted view, the device parameters in the parasitic netlist has to match that of the device CDF. E.g. LVS deck extracts a parameter named "W=123u" for fetABC and passes it to QRC(or Calibre xRC). QRC will simply use this parameter when creating the extracted view. But if the CDF info of fetABC is actually looking for a parameter named "width", it will not accept "W" from QRC and will use default value of "width" from CDF. This situation is possible because some pdks do additional mapping from "width" to "w" in CDF.

    (CDF : Component Description Format)

    Hence a wrong extracted view will be generated. But if we were to simply use a spice/spectre netlist with "W" and not "width", it would simulate well because "W" is what the model file needs.

    In the spectre parasitic netlist which you had obtained using Calibre xRC, does it has "simulator lang=spectre" as the 1st line? Is the file named with extension ".sp" instead of ".scs"? It should be named as ".scs".


    Best regards
    Quek

Reply
  • Quek

    Hi Kristen

    It is possible to run into problems only when generating extracted views and not spectre or spice netlists. This is because when generating extracted view, the device parameters in the parasitic netlist has to match that of the device CDF. E.g. LVS deck extracts a parameter named "W=123u" for fetABC and passes it to QRC(or Calibre xRC). QRC will simply use this parameter when creating the extracted view. But if the CDF info of fetABC is actually looking for a parameter named "width", it will not accept "W" from QRC and will use default value of "width" from CDF. This situation is possible because some pdks do additional mapping from "width" to "w" in CDF.

    (CDF : Component Description Format)

    Hence a wrong extracted view will be generated. But if we were to simply use a spice/spectre netlist with "W" and not "width", it would simulate well because "W" is what the model file needs.

    In the spectre parasitic netlist which you had obtained using Calibre xRC, does it has "simulator lang=spectre" as the 1st line? Is the file named with extension ".sp" instead of ".scs"? It should be named as ".scs".


    Best regards
    Quek

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