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Finding Bus Range conflicts through schematic rules check

markbeck

Greetings all,

I'm running IC6.15.500.6

I'm running into the situation where a designer might inadvertantly invert a bus without intending to.

If you have an instance with a port named "foo<1:0>" and you connect a wire to the port on an instantiated instance, Virtuoso will (by default) assign that wire a ascending port name "netxxx<0:1>". This causes the netxxx<0> to connect to port foo<1> and netxxx<1> connect to port foo<0>.

I know that you can set an environmental variable to define the order in which it is defined:  schematic netNameRangeDescend boolean t

However, I would like to add this sort of error to the standard checker that gets run when the designer does a "check and save".

I looked through the "Schematic Rules Checks Setup" dialog, but I couldn't find a pre-defined check.

Is there one?

Mark

Parents

  • Hi Andrew,

    Thanks for the reply and the code example.  I had already written the custom check, but it seemed like such a standard thing to do that I was curious whether there was one built in and I just couldn't find it.  

    Mark

Reply

  • Hi Andrew,

    Thanks for the reply and the code example.  I had already written the custom check, but it seemed like such a standard thing to do that I was curious whether there was one built in and I just couldn't find it.  

    Mark

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