Community Custom IC Design Schematic & Layout XL issue
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Schematic & Layout XL issue

jimito13

 Dear forum members and experts,

I am facing an issue with the interaction between Schematics L & Virtuoso Layout XL : When i am selecting a net on the schematic the respective layout net is not being highlighted.How can i resolve this problem?I must note that this happens only with nets (pins,devices are highlighted when i select the respective component from the schematic's side).

Completing my request with the CAD & PDK information :

Technology : IBM 130nm (bicmos8WL)

CAD Versions : IC5141-HF149 & Assura CDB 4.1 5141USR2HF10

Thanks in advance for any helpful answer.

Best Regards,

Jimito13-Analog RFIC Designer

 

  • Hi, 

    I would reextract connectivity in the layout.

    You can find this option  under the Connectivity menu->Re-extract Layout

    Regards,

    Eduard Raines

  • Thanks for the answer.

    I tried your suggestion but didn't work...

    Anymore ideas?Is it an environment setting (some variable @ .cdsenv , .cdsinit files) or a bug or another setting i should go up with?

    Thanks again.

  • Hi,

    No env vars would help in this case.

    I am assuming you are using VXL.

    It's difficult to tell what is going on without actual test case.

    But here is some stuff you can try:

    Check if you net has connectivity attached to it.

    If not,delete it and reroute it.See if you get connectivity after rerouting it.

    If you don't get connectivity, check if your pins/instances have connectivity.

    Try to re-extract hierarchicaly

    Regards,

    Eduard Raines

  • Eduard,

    Firstly,thanks for your answers.

    As i mentioned at my first post i indeed use VXL.

    I have already been through those thoughts (your suggestions) and in addition i tried them as long as the hierarchical re-extraction which didn't work either.

    I will be still waiting for more contributions and a possible solution to my issue.

    Best Regards.

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