• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

  1. Community Forums
  2. Custom IC Design
  3. Schematic & Layout XL issue

Stats

  • Locked Locked
  • Replies 4
  • Subscribers 126
  • Views 1482
  • Members are here 0
This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

Schematic & Layout XL issue

jimito13
jimito13 over 13 years ago

 Dear forum members and experts,

I am facing an issue with the interaction between Schematics L & Virtuoso Layout XL : When i am selecting a net on the schematic the respective layout net is not being highlighted.How can i resolve this problem?I must note that this happens only with nets (pins,devices are highlighted when i select the respective component from the schematic's side).

Completing my request with the CAD & PDK information :

Technology : IBM 130nm (bicmos8WL)

CAD Versions : IC5141-HF149 & Assura CDB 4.1 5141USR2HF10

Thanks in advance for any helpful answer.

Best Regards,

Jimito13-Analog RFIC Designer

 

  • Cancel
Parents
  • Eduard Raines
    Eduard Raines over 13 years ago

    Hi,

    No env vars would help in this case.

    I am assuming you are using VXL.

    It's difficult to tell what is going on without actual test case.

    But here is some stuff you can try:

    Check if you net has connectivity attached to it.

    If not,delete it and reroute it.See if you get connectivity after rerouting it.

    If you don't get connectivity, check if your pins/instances have connectivity.

    Try to re-extract hierarchicaly

    Regards,

    Eduard Raines

    • Cancel
    • Vote Up 0 Vote Down
    • Cancel
Reply
  • Eduard Raines
    Eduard Raines over 13 years ago

    Hi,

    No env vars would help in this case.

    I am assuming you are using VXL.

    It's difficult to tell what is going on without actual test case.

    But here is some stuff you can try:

    Check if you net has connectivity attached to it.

    If not,delete it and reroute it.See if you get connectivity after rerouting it.

    If you don't get connectivity, check if your pins/instances have connectivity.

    Try to re-extract hierarchicaly

    Regards,

    Eduard Raines

    • Cancel
    • Vote Up 0 Vote Down
    • Cancel
Children
No Data

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.

© 2025 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information