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Importing verilog to Cadence schematic

Hello,

I am trying to import a very simple verilog code containing one latch into Cadence using Import -> Verilog on CIW. I get the following error message.

INFO (VERILOGIN_GUI-13): Verilog Import process has started ...
ERROR (VERILOGIN-205): An internal memory error has occurred. Exiting.
INFO (VERILOGIN_GUI-15): Verilog Import completed. Look at logfile, ./verilogIn.log, for process execution details.

There is nothing in the logfile and I have enough memory. I am using IC6.1.5. Any help is appreciated!

Wonyoung

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Andrew Beckett over 13 years ago

I wouldn't recommend using verilog2oa - maybe you could use "ihdl" instead, but that's effectively the same command being used from the Import Verilog command.
Andrew.
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Andrew Beckett over 13 years ago

I wouldn't recommend using verilog2oa - maybe you could use "ihdl" instead, but that's effectively the same command being used from the Import Verilog command.
Andrew.
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