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substrate noise analysis

whlinfei

Hi All,

 I am designing a switching amplifier using a CMOS 65nm process with a normal QFN package. So the noise induced by the switching output stage is quite large. The power supplies are separated for analog and power parts. But the noise can still get through by substrate.

 I want to find out what is the noise level at the analog domain.

Can anyone help me out how I can run this analysis?

Suppose I have the general floorplan and the model of the noise source. 

Parents

  • Hi Andrew,

     

    I tried the QRC but there is no substrate extraction tab in the QRC setup file. It seems different from the QRC user manual.

    I tried to follow the instructions in the manual but nothing works. 

     Would you kindly advise what are the possible reasons for that ? And any solutions to fix it?

     Thank you very much.

     Best Regards,

    Linfei 

Reply

  • Hi Andrew,

     

    I tried the QRC but there is no substrate extraction tab in the QRC setup file. It seems different from the QRC user manual.

    I tried to follow the instructions in the manual but nothing works. 

     Would you kindly advise what are the possible reasons for that ? And any solutions to fix it?

     Thank you very much.

     Best Regards,

    Linfei 

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