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Post-simulation error

Campo85
Campo85 over 13 years ago

Hi all,

I have a problem with spectre in the post simulation. I've extracted the parassitic from layout with Assura QRC, then I've modified the enviroment in spectre ( Switch View List : av_extracted and Stop View List : av_extracted ), but when I ran the simulation in spectre I get the follow error :

 

Error found by spectre during circuit read-in.

ERROR (SFE-23): "input.scs" 67: I5 is an instance of an undefined model subcircuit.

ERROR (SFE-23): "input.scs" 68: I6 is an instance of an undefined model subcircuit.

ERROR (SFE-23): "input.scs" 69: I4 is an instance of an undefined model subcircuit.

 
"I4","I5" and "I6" are my design. I attach the log
 
 
  • ade_xl.txt
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  • Campo85
    Campo85 over 13 years ago

    Ok, an update. I started from scratch my test. When I regenerated the netlist I've got a lot of warnings in CDS.log :

     

     INFO (OSSHNL-251): Mismatch found in the direction of terminal 'CLOCK_MASTER' in the placed master

    \o 'DICE_LIB/FF_DICE/symbol' and its corresponding terminal in the switch master 'DICE_LIB/FF_DICE/av_extracted',

    \o however, this terminal is printed in the netlist because the variable

    \o simCheckTermDirectionMismatch is either set to 'ignore' or is not set.

    \o

    \o INFO (OSSHNL-251): Mismatch found in the direction of terminal 'CLOCK_SLAVE' in the placed master

    \o 'DICE_LIB/FF_DICE/symbol' and its corresponding terminal in the switch master 'DICE_LIB/FF_DICE/av_extracted',

    \o however, this terminal is printed in the netlist because the variable

    \o simCheckTermDirectionMismatch is either set to 'ignore' or is not set.

    ....
     
    CLOCK_MASTER,  CLOCK_SLAVE, etc... are the I/O pins of the design. How can I fix the mismatch beetwen symbol and extracted ?
    • CDS.log.txt
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  • Campo85
    Campo85 over 13 years ago

    Ok, an update. I started from scratch my test. When I regenerated the netlist I've got a lot of warnings in CDS.log :

     

     INFO (OSSHNL-251): Mismatch found in the direction of terminal 'CLOCK_MASTER' in the placed master

    \o 'DICE_LIB/FF_DICE/symbol' and its corresponding terminal in the switch master 'DICE_LIB/FF_DICE/av_extracted',

    \o however, this terminal is printed in the netlist because the variable

    \o simCheckTermDirectionMismatch is either set to 'ignore' or is not set.

    \o

    \o INFO (OSSHNL-251): Mismatch found in the direction of terminal 'CLOCK_SLAVE' in the placed master

    \o 'DICE_LIB/FF_DICE/symbol' and its corresponding terminal in the switch master 'DICE_LIB/FF_DICE/av_extracted',

    \o however, this terminal is printed in the netlist because the variable

    \o simCheckTermDirectionMismatch is either set to 'ignore' or is not set.

    ....
     
    CLOCK_MASTER,  CLOCK_SLAVE, etc... are the I/O pins of the design. How can I fix the mismatch beetwen symbol and extracted ?
    • CDS.log.txt
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