could you please help how to get verilog file from schematic.
The Verilog netlister (using "si") can do this. This is covered in solution 1839821 . The quick executive summary is that you can put:
vlogifCompatibilityMode = "4.0"
in your .simrc (or .cdsinit if using Virtuoso). It will then create a single Verilog netlist (concatenated from the individual pieces that the verilog netlister normally produces).