I am trying to import a CDL netlist using Spice In to generate a schematic view. However, I would like to keep the VDD and VSS pins local. When the import process calls conn2sch, conn2sch insists on appending a '!' to those net names because it thinks they should be global...
In my CDL netlist, there is no *.GLOBAL or *.PIN control statement, and the subcircuit header reads as
.SUBCKT cell1 Y VDD VSS A
I generated just a netlist view and sure enough the VDD and VSS signals in the view have isGlobal set to 't'. Where does this occur in the translation process, and how can I prevent that from happening?
First, thanks so much for trying to reproduce the issues, Andrew, I appreciate it a lot.
Unfortunately, I tried with your minimal example, and I still see the same issues... my generated schematic (analogue) is the same in every regard except for the VDD and VSS pins; conn2sch still warns that VDD and VSS are supposed to be global and appends a '!'. I'm importing into a library with no techfile attached, and with no PDK customisations, too...
We're running ISR12, so maybe that's the issue?
Either way, any ideas where this might be tripping up? Odd default settings in the Assura parser hidden away somewhere?