• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

  1. Community Forums
  2. Custom IC Design
  3. model card vith a verilogA model through spectre

Stats

  • Locked Locked
  • Replies 11
  • Subscribers 127
  • Views 22162
  • Members are here 0
This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

model card vith a verilogA model through spectre

Fabb
Fabb over 12 years ago

Hello,

I would like to run my own verilogA model with spetcre through a model card approach.

Nevertheless my model paramaters are not recognized, so not took into account in the simulation

#------------------------mymodel.va
module mymodel(T1,T2);
    
    inout T1, T2;
    electrical T1, T2;

    // instance parameters
    parameter real    ip1=1;
    //Technology Parameters
    parameter real tp1=1;
        analog begin
        @(initial_step)
        begin
            $strobe("----> mymodel");
            $display("Instance parameters: ip1=%r, ip1);
            $display("Technology parameters: tp1=%r , tp1);
        end
    endmodule

#------------------------model card
simulator lang=spectre

library test

section means
    parameters efftp1 = 777
        include "model_cards.scs" section=core
endsection means


section core
    ahdl_include "mymodel.va"        
    model device1 mymodel
        +tp1 = efftp1
endsection core
endlibrary

#------------------------cdf parameters
((nil name "ip1" paramType "string" defValue "1" prompt "ip1" choices nil parseAsNumber t units "lengthMetric" use nil display nil editable nil dontSave nil callback nil storeDefault t parseAsCEL t) (nil name "model" paramType "string" defValue "" prompt "model name" choices nil parseAsNumber nil units nil use nil display nil editable nil dontSave nil callback nil storeDefault nil parseAsCEL t))
(nil spectre (nil modelParamExprList "" optParamExprList "" opParamExprList "" stringParameters "" propMapping "" termMapping "nil T1 \\:1 T2 \\:2" termOrder "T1 T2" componentName "" instParameters "radius" otherParameters "model" netlistProcedure "") hspiceD (nil opParamExprList "" optParamExprList "" propMapping "" termMapping "" termOrder "" namePrefix "" componentName "" instParameters "" otherParameters "" netlistProcedure "") auLvs (nil namePrefix "" permuteRule "" propMapping "" deviceTerminals "" termOrder "" componentName "" instParameters "" otherParameters "" netlistProcedure "") auCdl (nil dollarEqualParams "" dollarParams "" modelName "" namePrefix "" propMapping "" termOrder "" componentName "" instParameters "" otherParameters "" netlistProcedure "") ams (nil isPrimitive "" extraTerminals "" propMapping "" termMapping "" termOrder "" componentName "" excludeParameters "" arrayParameters "" stringParameters "" referenceParameters "" enumParameters "" instParameters "" otherParameters "" netlistProcedure ""))
(nil paramLabelSet nil opPointLabelSet nil modelLabelSet nil paramDisplayMode nil paramEvaluate "nil nil nil nil nil" paramSimType nil termDisplayMode nil termSimType nil netNameType nil instDisplayMode nil instNameType nil)
(nil doneProc "" formInitProc "" promptWidth 175 fieldWidth 350 buttonFieldWidth 340 fieldHeight 35)

#------------------------error message

tp1 not recognized in mymodel.va


How should I proceed to allow parameters to be modified in a modelCard.

Regards,

Fabrice

  • Cancel
Parents
  • kjabeur
    kjabeur over 12 years ago

    Hello,

     In my case I am declaring new quantities (nature and discipline) in my veriloga file.

    I needed this to boost the value of the blowup in order to avoid some convergence problems I encountered.

    Now, I target to set my model card.

    using the lines : `include "disciplines.vams"   //(* compact_module *)  (* instance_parameter_list ={a,b} *)  on top of my code, I get tghe following error when I launch my simulations  ""Error found by spectre during AHDL read-in.  ERROR (VACOMP-2259): "nature<<--?  new_current"

    Although when I don't use  //(* compact_module *)  (* instance_parameter_list ={a,b} *)  on top of my code and subsequently I use subckt in my .scs file I don't have any error and that works good !

    To conclude, can We deduce that I can not use new quantities in my veriloga code if I use  //(* compact_module *)  (* instance_parameter_list ={a,b} *)  on top of my code ?

    Thanks in advance

     Best regards 

    Kotb 

    • Cancel
    • Vote Up 0 Vote Down
    • Cancel
Reply
  • kjabeur
    kjabeur over 12 years ago

    Hello,

     In my case I am declaring new quantities (nature and discipline) in my veriloga file.

    I needed this to boost the value of the blowup in order to avoid some convergence problems I encountered.

    Now, I target to set my model card.

    using the lines : `include "disciplines.vams"   //(* compact_module *)  (* instance_parameter_list ={a,b} *)  on top of my code, I get tghe following error when I launch my simulations  ""Error found by spectre during AHDL read-in.  ERROR (VACOMP-2259): "nature<<--?  new_current"

    Although when I don't use  //(* compact_module *)  (* instance_parameter_list ={a,b} *)  on top of my code and subsequently I use subckt in my .scs file I don't have any error and that works good !

    To conclude, can We deduce that I can not use new quantities in my veriloga code if I use  //(* compact_module *)  (* instance_parameter_list ={a,b} *)  on top of my code ?

    Thanks in advance

     Best regards 

    Kotb 

    • Cancel
    • Vote Up 0 Vote Down
    • Cancel
Children
No Data

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.

© 2025 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information