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  3. Fabrication issue in Virtuoso layout design.

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Fabrication issue in Virtuoso layout design.

bjstroll
bjstroll over 11 years ago

Hi,

In virtuoso, there is select layer over active layer to identify the tpye of the active layer, along with related design rules (like select layers can not overlap).

My question is when we use n-well or p-well process, we need to moderate dope our substrate to create wells first, but why there is not a select layer to identify what kind of wells we want and not related design rules?

 Regards,

stroll 

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  • bjstroll
    bjstroll over 11 years ago

    Hi Andrew, this is a simple nMOS (in the left) with a ptub next to it. We can see that n-active area is surrounded by a green rectangle which is n-select layer, and p-active is surrounded by an orange rectangle which is p-select layer. That's what I mean.

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  • bjstroll
    bjstroll over 11 years ago

    Hi Andrew, this is a simple nMOS (in the left) with a ptub next to it. We can see that n-active area is surrounded by a green rectangle which is n-select layer, and p-active is surrounded by an orange rectangle which is p-select layer. That's what I mean.

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