In virtuoso, there is select layer over active layer to identify the tpye of the active layer, along with related design rules (like select layers can not overlap).
My question is when we use n-well or p-well process, we need to moderate dope our substrate to create wells first, but why there is not a select layer to identify what kind of wells we want and not related design rules?
OK, so you're talking about "p implant" or "n implant" (sometimes called pplus or nplus). Fair enough - you have a layer to define the implant that's used on the diffusion opening (or active area).
You typically have a layer to define nwell (or pwell, depending on the type of substrate). I don't see why you'd need two layers to describe that? So I still don't really understand your question. If your transistor is used on a p-substrate, there's no need to draw a well around an nmos transistor (but there would be around a pmos transistor).
Note that this is nothing to do with Virtuoso at all - it's to do with how the technology has been set up and what mask layers you actually need for manufacture.