Long term jitter from SpectreRF's Phase noise?

Long term jitter is normally determined for a specified number of cycles - so yes, entering the number of cycles is the way to do it.

Of course, you need to make sure you simulate the noise low enough in frequency to include noise over the total number of cycles you want to capture the long term jitter.

The calculations will ensure that the integration is done properly over the number of cycles you want.

You can do transient with an eye-diagram, and turn on transient noise, but this is a much less effective way of measuring jitter (it's less efficient, and less accurate, unless your circuit is non-periodic in nature or has a large signal response to the noise) than pnoise.

Regards,

Andrew.

Dear Andrew,

Thank you very much for your kind reply. Thanks for clarifying me.

""you need to make sure you simulate the noise low enough in frequency to include noise over the total number of cycles you want to capture the long term jitter"' .... here noise, in low enough in frequency, meanse what? I have taken it as 10KHz (up to 100M) . Is that value is fine enough to my clock synthesizer driving CPU.


While simulation, there is no option for giving the time for simulation or simulation of no. of cycles. I beleive the tool will do simulations only for few cycles, And later it only extrapolates for other k=higher values. If this is the case, I doubt that wether this Jitter for k= say 3000 is not realistc.


Also can you please tell how I can measure the PFD+CP phase noise from Spectre. I want to compare the phase noise of CP+PFd+Divider+LPF with that of VCO.

Kindly guide me.

Thanks & Regards
SavithRu

I can't tell whether 10kHz is low enough in frequency from the information you've given. If you want 3000 cycles, you need to go down as low as Fcycle/3000 - so if your clock is above 30MHz, you'll be OK.

Since the jitter is coming from the noise analysis that is done, there is no need to simulate more cycles in the time domain. A single cycle of the output clock will be enough to capture the non-linearities so that pnoise can include all the noise folding that occurs in the circuit. It can then compute the noise response over frequency, and the k-cycle jitter will be dependent on integrating over that number of cycles (but in the frequency domain). So provided you have simulated the pnoise low enough in frequency to capture the noise at that fraction of your clock frequency, you'll be OK. The integration itself is far from trivial, but the pnoise form takes care of that - you just need to ensure that the frequency range is wide enough, and that it you've asked for the number of cycles you want.

The result should be realistic (in terms of the the random jitter). You won't of course be capturing any deterministic jitter this way.

Regards,

Andrew.