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Accuracy of CROSS() function in Verilog-A

RFStuff

Dear All,

I am using cross() in verilog-A as below:-

 

vtol=1e-12;

@(cross(phase-10u,+1,ttol,vtol)) begin
       $strobe("TIME = %rs \n", $abstime);
     end

But when I checked the abstime, it is NOT exactly at 10u of phase but at 10.541u of phase. This error is much larger than my vtol value.

But when I chnaged to strobeperiod of tran analysis to  1ns, abstime shows up at phase value of 10.002u.

I wonder why such descrpancy and why vtol  is NOT playing any role here.

Kind Regards,

 

 

Parents
  • RFStuff

    Dear Andrew,

    I am using Spectre version :-  sub-version  12.1.0.402.isr5.

    The code is a simple one which model a digital Oscillator whose Time period varies with respect to the input voltage V(in).

    The code is as below:-

     // VerilogA for VERILOG_A_MODEL, DCO, veriloga

    `include "constants.vams"
    `include "disciplines.vams"

    module DCO (in, out,out1);

    input in;
    output out,out1;
    electrical in, out,out1,phase_out;
    parameter real Vlo=0, Vhi=1.25;

    parameter real Vth=0;

    parameter real ttol=1p;
    parameter real vtol=1p;
    parameter real tt = 1p;


    parameter real KT=200e6;
    parameter real Tv_0= 0.5n;
    real n,delay;
    parameter real start_delay=1n;

    real T_period;
    real Time_Span;
    real phase,reset;



    analog begin

    @(initial_step) begin
          V(out) <+ 0;    
          
          delay= start_delay;
     end
     reset =0;
     
     T_period = Tv_0 + KT * V(in) ;
     
     

     V(phase_out) <+ phase;
        
     @(cross(V(phase_out)-T_

    period,+1,ttol,vtol)) begin
           reset=1;
           delay =0;
           $strobe("EDGE_TIME = %rs \n", $abstime);
          
         end
         
          phase= idt(1,0,reset) - delay; // Phase Integration


      n= (phase >=0) && (phase < (T_period/2));
         
         V(out) <+ transition(n ? Vhi:Vlo,0,tt);
         V(out1) <+ phase ;
         
         //$bound_step(0.01n);     
         
    end
     endmodule
     
Reply
  • RFStuff

    Dear Andrew,

    I am using Spectre version :-  sub-version  12.1.0.402.isr5.

    The code is a simple one which model a digital Oscillator whose Time period varies with respect to the input voltage V(in).

    The code is as below:-

     // VerilogA for VERILOG_A_MODEL, DCO, veriloga

    `include "constants.vams"
    `include "disciplines.vams"

    module DCO (in, out,out1);

    input in;
    output out,out1;
    electrical in, out,out1,phase_out;
    parameter real Vlo=0, Vhi=1.25;

    parameter real Vth=0;

    parameter real ttol=1p;
    parameter real vtol=1p;
    parameter real tt = 1p;


    parameter real KT=200e6;
    parameter real Tv_0= 0.5n;
    real n,delay;
    parameter real start_delay=1n;

    real T_period;
    real Time_Span;
    real phase,reset;



    analog begin

    @(initial_step) begin
          V(out) <+ 0;    
          
          delay= start_delay;
     end
     reset =0;
     
     T_period = Tv_0 + KT * V(in) ;
     
     

     V(phase_out) <+ phase;
        
     @(cross(V(phase_out)-T_

    period,+1,ttol,vtol)) begin
           reset=1;
           delay =0;
           $strobe("EDGE_TIME = %rs \n", $abstime);
          
         end
         
          phase= idt(1,0,reset) - delay; // Phase Integration


      n= (phase >=0) && (phase < (T_period/2));
         
         V(out) <+ transition(n ? Vhi:Vlo,0,tt);
         V(out1) <+ phase ;
         
         //$bound_step(0.01n);     
         
    end
     endmodule
     
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