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How to calculate areaCap?

baumanets

techfile contain section (for example)

electricalRules(
   characterizationRules( 
      ( areaCap   metal1   1.4e-4 )
      ( edgeCap   metal1   4.0e-5 )
      ( sheetRes    metal1    0.040000 )
)
How to calculate areaCap?
 

 

 

Parents

  • Such simplistic capacitance measurements are rarely used these days of many layers of metal; the areaCap (areaCapacitance in OA versions of the tools) is the area coefficient of the wire-to-ground (i.e. substrate) capacitance. This is covered in the documentation.

    As to how they come up with the value - it's probably either computed using a very simple computation of the dielectric thickness between the substrate and the metal layer in question (the thicknesses of oxides and metals are reasonably well controlled) and the permittivity - see any text which describes capacitance - or maybe they measure it from a test chip. Neither would be hard.

    Most reasonable extraction strategies these days would involve using a description of the process stack (thicknesses of conductors, dielectric thicknesses, permittivity of each dielectric, typical widths and spacings) and then using a 3D solver either directly (not good for large number of shapes) or to produce pattern matching models in a variety of different scenarios to allow rapid 2.5D extraction of routing including multi-layer area and fringing effects (and others). So a simplistic single area capitance is of very limited use or accuracy.

    Regards,

    Andrew.

Reply

  • Such simplistic capacitance measurements are rarely used these days of many layers of metal; the areaCap (areaCapacitance in OA versions of the tools) is the area coefficient of the wire-to-ground (i.e. substrate) capacitance. This is covered in the documentation.

    As to how they come up with the value - it's probably either computed using a very simple computation of the dielectric thickness between the substrate and the metal layer in question (the thicknesses of oxides and metals are reasonably well controlled) and the permittivity - see any text which describes capacitance - or maybe they measure it from a test chip. Neither would be hard.

    Most reasonable extraction strategies these days would involve using a description of the process stack (thicknesses of conductors, dielectric thicknesses, permittivity of each dielectric, typical widths and spacings) and then using a 3D solver either directly (not good for large number of shapes) or to produce pattern matching models in a variety of different scenarios to allow rapid 2.5D extraction of routing including multi-layer area and fringing effects (and others). So a simplistic single area capitance is of very limited use or accuracy.

    Regards,

    Andrew.

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