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SPICE Model for Magnetic Tunnel Junctions

xiaoweishawn

I am trying to find a good model for magnetic tunnel junction(MTJ) that could work in Cadence to do simulation. BTW, MTJ is a new device and has no present models in cadence like nefet or pfet. I happended to find this one nanohub.org/.../SPICE_Model_Manual.pdf​ which seems quite promising.

according to what said on the webpage, the model file includes 6 files: LLG.lib, LLGThermRandNum.va, MTJ.lib, MTJ_res.va, NRL_MTJspice_ENC_LIB.inc and USUAGE( these files could be found  nanohub.org/.../19048, then under the supporting Docs column). 

My question is what might  these six files for and how could I performe simulation with these six files in cadence?

I am a beginner in cadence, not sure whether I express myself clear or not. Thanks so much for your possible help!

Bless. 

 

Parents

  • Hi Xiaowei

    The snapshot below shows an nmos and in the properties form on the right, we can see a "Model name" field. The actual name of the field is "model". "Model name" is just for display purpose. This field will be netlisted during spectre simulation so that the nmos takes on the model "g45n2svt". This is done through settings in the CDF (component description format). The user will need to include a model file in ADE that describes the contents of "g45n2svt". Otherwise there will be an error during simulation.

    You can import the verilogA files and automatically generate their symbols so that the symbols can be placed in a schematic and be connected with other blocks. Here is how you can do it:

    a. In library manager, go to "File->New->cellview"
    b. Select "verilogA" as the type of cellview
    c. Cut and paste the verilogA codes into the text editor
    d. Close the editor. There will be a dialog box to ask if a symbol should be generated.
    e. Select "Yes".
    f. Completed

    You can include the following line in the cds.lib file to have an idea of how verilogA files can be used. It is a built-in library of verilogA cells.

    DEFINE ahdlLib $CDSHOME/tools/dfII/samples/artist/ahdlLib


    Best regards
    Quek

Reply

  • Hi Xiaowei

    The snapshot below shows an nmos and in the properties form on the right, we can see a "Model name" field. The actual name of the field is "model". "Model name" is just for display purpose. This field will be netlisted during spectre simulation so that the nmos takes on the model "g45n2svt". This is done through settings in the CDF (component description format). The user will need to include a model file in ADE that describes the contents of "g45n2svt". Otherwise there will be an error during simulation.

    You can import the verilogA files and automatically generate their symbols so that the symbols can be placed in a schematic and be connected with other blocks. Here is how you can do it:

    a. In library manager, go to "File->New->cellview"
    b. Select "verilogA" as the type of cellview
    c. Cut and paste the verilogA codes into the text editor
    d. Close the editor. There will be a dialog box to ask if a symbol should be generated.
    e. Select "Yes".
    f. Completed

    You can include the following line in the cds.lib file to have an idea of how verilogA files can be used. It is a built-in library of verilogA cells.

    DEFINE ahdlLib $CDSHOME/tools/dfII/samples/artist/ahdlLib


    Best regards
    Quek

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