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Layout netlist extraction

PietroUser

Hello,

is there a simple way to extract the netlist from a layout without parasitics without doing the full LVS with Assura?

I am writing the extract.rul file and searching for a way to debug it.

 

Thanks,

 

Pietro

Parents

  • Hi Pietro

    Using an LVS/ERC tool to extract a layout netlist is already the most simple method. There is no need to do a full LVS. Just you only require the layout netlist, you can just use an empty cdl netlist or a dummy schematic for the LVS. Layout netlist can then be obtained as follows:

    terminal>vldbToCdl design.ldb > design_layout.cdl


    Best regards
    Quek

Reply

  • Hi Pietro

    Using an LVS/ERC tool to extract a layout netlist is already the most simple method. There is no need to do a full LVS. Just you only require the layout netlist, you can just use an empty cdl netlist or a dummy schematic for the LVS. Layout netlist can then be obtained as follows:

    terminal>vldbToCdl design.ldb > design_layout.cdl


    Best regards
    Quek

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