Stats

  • Locked Locked
  • Replies 6
  • Subscribers 125
  • Views 15320
  • Members are here 0
This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

Is the device capacitance bias-dependent or independent?

Alex Liao
Hi, I would like to know if the device intrinsic capacitance like Cgs bias-dependent or independent. Giving say, bias 400mV or 500mV (common source circuit with Vgs = 400mV or 500mV) for 65nm technology, is the Cgs the same or different and why？

Thanks,
Alex
Parents

  • Hi Shawn,

     I got the first paragraph.

    I am interested in your saying in the second paragraph. By saying routing capacitance, are you saying interconnection Cap between devices or the interconnection Cap inside a device? By knowing the answer of this question, I would know more clearly the "start point of ‘gate’ ".

    For example, I have a device nch with NF =1, W = 2u, L = 100n. Consider a real layout. 

    In layout view, are you considering the total 2u * 100n poly area as a whole as the 'start point of gate' or any small squares/ number of contacts in that area as the 'start point of gate'?

    If it is the former case, interconnect would be any routing to this whole poly gate. IF it is the latter case, interconnect might be referring to the one from two parts. 1.Other remaining part of 2u*100n area to those contacts or only one contact. PLUS 2. routing interconnect  outside this example device.

     

    Thanks,

    Alex 

Reply

  • Hi Shawn,

     I got the first paragraph.

    I am interested in your saying in the second paragraph. By saying routing capacitance, are you saying interconnection Cap between devices or the interconnection Cap inside a device? By knowing the answer of this question, I would know more clearly the "start point of ‘gate’ ".

    For example, I have a device nch with NF =1, W = 2u, L = 100n. Consider a real layout. 

    In layout view, are you considering the total 2u * 100n poly area as a whole as the 'start point of gate' or any small squares/ number of contacts in that area as the 'start point of gate'?

    If it is the former case, interconnect would be any routing to this whole poly gate. IF it is the latter case, interconnect might be referring to the one from two parts. 1.Other remaining part of 2u*100n area to those contacts or only one contact. PLUS 2. routing interconnect  outside this example device.

     

    Thanks,

    Alex 

Children
No Data

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.