cadence virtuoso available utilities

Dear auto dipper,

 > i have drawn the schematic of a majority circuit in cadence virtuoso IC610 version and have

> done transient analysis over it. want to check the net capacitance of each node.

I am afraid I am little confused about what exactly you are trying to display. If the netlist is based  on your schematic only, then the nodal capacitances are zero as the MOS capacitances are all contained in each device model. The actual "effective" capacitance on each node will depend on the number of devices connected to the node of interest and the specific manner in which they are connected. For example, if a device has its gate attached to the node, not only will the MOS Cgs and Cds contribute to the nodal capacitance, but its Miller capacitance will also contribute to the nodal capacitance. Therefore, to ascertain the capacitance at a specific node requires a series of small-signal analyses where the impedance of each node is determined over the voltage range of the node. For each small-signal analysis, one computes the effective capacitance at a specific frequency from the imaginary part of the impedance seen at that node. The small signal analyses can be done using the Spectre actran analysis feature at the time points in the transient analysis you specify. 

I hope you understand what I am trying to explain. The computation of nodal capacitance from a pure schematic based netlist is not an "automated" process nor is it a trivial computation from a transient analysis.

If your netlist is created from an extracted view of a layout, there is a parasitic tool that can be accessed from the Virtuoso Launch->Parasitics menu item. The specific extracted view to use and the signal grounds are selected in the new Parasitic menu that will then appear under Parasitics->Setup... The resulting nodal capacitances due to the layout parasitic capacitances can be either sent to a file or displayed on the schematic.

I may not have understood your specific request - and apologize if I did not!

Shawn

Dear auto dipper,

 > i have drawn the schematic of a majority circuit in cadence virtuoso IC610 version and have

> done transient analysis over it. want to check the net capacitance of each node.

I am afraid I am little confused about what exactly you are trying to display. If the netlist is based  on your schematic only, then the nodal capacitances are zero as the MOS capacitances are all contained in each device model. The actual "effective" capacitance on each node will depend on the number of devices connected to the node of interest and the specific manner in which they are connected. For example, if a device has its gate attached to the node, not only will the MOS Cgs and Cds contribute to the nodal capacitance, but its Miller capacitance will also contribute to the nodal capacitance. Therefore, to ascertain the capacitance at a specific node requires a series of small-signal analyses where the impedance of each node is determined over the voltage range of the node. For each small-signal analysis, one computes the effective capacitance at a specific frequency from the imaginary part of the impedance seen at that node. The small signal analyses can be done using the Spectre actran analysis feature at the time points in the transient analysis you specify. 

I hope you understand what I am trying to explain. The computation of nodal capacitance from a pure schematic based netlist is not an "automated" process nor is it a trivial computation from a transient analysis.

If your netlist is created from an extracted view of a layout, there is a parasitic tool that can be accessed from the Virtuoso Launch->Parasitics menu item. The specific extracted view to use and the signal grounds are selected in the new Parasitic menu that will then appear under Parasitics->Setup... The resulting nodal capacitances due to the layout parasitic capacitances can be either sent to a file or displayed on the schematic.

I may not have understood your specific request - and apologize if I did not!

Shawn