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  3. advanced layout pcells?

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advanced layout pcells?

archive
archive over 19 years ago

A basic analog/mixed-signal pdk for has the following primitive pcells:

  • mos transistor
  • capacitor
  • resistor
  • bjt
  • diode
Of course, these "basic" pcells can grow to be quite complex depending on process variations (low voltage, high voltage, triple well, isolation, high resistance, low resistance, etc.).  Additional bells and whistles have generally complicated my pcells more than the process variations.

Beside these more basic pcells, what advanced pcells are you creating or using for analog/mixed-signal layout design?


Originally posted in cdnusers.org by m27315
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  • archive
    archive over 19 years ago

    As you say, some of these can be quite complex. Other examples are for inductors - where you might have a variety of different inductor shapes, number of layers, pattern ground, entry points for the inductor, options to tie multiple layers together in the inductor, etc, etc.

    Probably used more for RF kits than analog/mixed-signal kits.

    Andrew.


    Originally posted in cdnusers.org by adbeckett
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  • archive
    archive over 19 years ago

    I did create a pcell of a 2D common centroid layout of a differential pair, just to see if I could. It was quite fun and turned out to be reasonably usable as well.

    I've also created pcells for helping with large numbers of pins (I'm sure there is probably a "proper" way to do it) so when I'm faced with an array of n*m regularly spaced pins it's still an easy task.

    My bonding diagram pcells are quite nice as well - they take the package part of the bonding diagram and a text file and produce a layout with all of the package pins labelled as an easy reference.

    Generally, I like using pcells to help me get things done rather than just for devices, although devices are a large part of that as well of course (the foundries tend to provide them though).

    Cheers,

    Roger


    Originally posted in cdnusers.org by rogerlight
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    archive over 19 years ago

    How could I forget these...

    A library of different physical/logical size address decoders based on a pcell where all of the inputs can be set as inverted/not inverted, and a skill pcell that takes that individual pcell and converts it into a full address decoder.

    Cheers,

    Roger


    Originally posted in cdnusers.org by rogerlight
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