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  3. Abstract generator gdsii file import problem

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Abstract generator gdsii file import problem

Dinesh Varma4
Dinesh Varma4 over 10 years ago

Hello,

First I exported  File-> export-> stream. and .lef file of inverter designed using cms9flp technology

Once the file were exported then i invoked abstract generator and i gave library, when i was trying to import gdsii file i am getting the following errors.

ERROR ABS-216: There are insufficient metal layers defined in the current design. You must define at least two metal layers in the validLayers subsection ofLEFDefaultRouteSpec constraint group of the technology file. These layers must have the layer function metal in the functions section. Update the technology file and attach it again.

ERROR ABS-218

There are no vias specified in the technology file. Ensure that the selected constraint group has a ValidVias section or at least one via is specified in the standardViaDefs subsection of the viaDefs section in the technology file. In addition, ensure that the function argument is set to 'cut' for the via in the functions subsection of the layerRules section and then try again.

I updated the technology file which was suggested by cadence help but still i am getting the same error

can some one please help me to resolve this error.

I really appreciate your time

Thanks.

DInesh

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  • Dinesh Varma4
    Dinesh Varma4 over 10 years ago

    I finally able to resolve this error.

    The problem is when ever i was giving my library  its not using the technology library that i dumped and modified.

    Once i made changes to my .tf file, i created new library with the modified tech file.

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  • Dinesh Varma4
    Dinesh Varma4 over 10 years ago

    I finally able to resolve this error.

    The problem is when ever i was giving my library  its not using the technology library that i dumped and modified.

    Once i made changes to my .tf file, i created new library with the modified tech file.

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  • iamKarthikBK
    iamKarthikBK over 4 years ago in reply to Dinesh Varma4
    Dinesh Varma4 said:
    The problem is when ever i was giving my library  its not using the technology library that i dumped and modified.

    Dinesh Varma4 Can you tell how exactly you resolved this error?
    I have drawn schematics and layouts and created symbols for basic gates (and2, or2, nand2, nor2, xor2, inv) usign Virtuoso. I want to use these for synthesis with Cadence Genus.
    Is this possible?

    Quek The training videos provided for the COS account only tell me how to use Genus. Can you please guide me as to how i can port my library created using Virtuoso to Genus for synthesis of HDL files? What all views need to be created for each cell?

    My final aim is to create a standard cell library that can be used for synthesis. As of now, I only have basic gates but I will add more cells later.
    As of now, I want to try out some synthesis using these basic gates.

    Thanks in advance!

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  • Quek
    Quek over 4 years ago in reply to iamKarthikBK

    Hi iamKarthikBK

    Please do not reply to old threads. This is against the rules for the forum. Please kindly start a new post for your issue.


    Best regards
    Quek

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