LVS Matching error

Rather hard to read your append because of the line wrap, but there's a much simpler way to solve this - rather than combining and keeping just w and l, keep track of m as well when you combine parallel mos. Here's some old code (not tested for a long time, but you should get the idea)

procedure(parallelMOS(m1 m2) 
    let((mt mult1 mult2 lmult1 lmult2) 
	mt = ncons(nil)
	mt->m = nil 
	mt->W = nil 
	mt->L = nil
	;----------------------------------------------------------------
	; get multipliers
	;----------------------------------------------------------------
	if(m1->m then
	    mult1 = m1->m
	else
	    mult1 = 1
	) 
	if(m2->m then
	    mult2 = m2->m
	else
	    mult2 = 1
	) 
	;----------------------------------------------------------------
	; get the length multipliers - this is so that the average length
	; can be calculated correctly
	;----------------------------------------------------------------
	if(m1->lm then
	    lmult1 = m1->lm
	else
	    lmult1 = 1
	) 
	if(m2->lm then
	    lmult2 = m2->lm
	else
	    lmult2 = 1
	) 
	;----------------------------------------------------------------
	; Combine widths - try to preserve multipliers if possible
	;----------------------------------------------------------------
	if(m1->W && m2->W then
	    if(m1->W == m2->W && m1->L == m2->L then
		mt->W = m1->W
		mt->m = mult1 + mult2
	    else
		mt->W = m1->W * mult1 + m2->W * mult2
		mt->m = 1
	    )
	)
	;----------------------------------------------------------------
	; Combine lengths
	;----------------------------------------------------------------
	when(m1->L && m2->L
	    mt->L = (m1->L * lmult1 + m2->L * lmult2) / (lmult1 + lmult2)
	    mt->lm = lmult1 + lmult2
	) 
	mt
    )
)

Note of course it means that you'd need to take into account the m factor in the comparison function - you could multiply W by m then. Or you could choose (Diva allows this) to reject combination of parallel devices which are not the same W and L. That's quite a good idea - and then you could also check that the m factors match between schematic and layout - it depends on how rigid you are about allowing folding of W into multiple fingers - for good analog layout, I would always say that you should not divide the W differently at layout time, because then delta-W effects mean that your layout doesn't really match the schematic, and that may mess up the behaviour of the design (for critical, matched transistor, circuits).

Regards,

Andrew. 

Rather hard to read your append because of the line wrap, but there's a much simpler way to solve this - rather than combining and keeping just w and l, keep track of m as well when you combine parallel mos. Here's some old code (not tested for a long time, but you should get the idea)

procedure(parallelMOS(m1 m2) 
    let((mt mult1 mult2 lmult1 lmult2) 
	mt = ncons(nil)
	mt->m = nil 
	mt->W = nil 
	mt->L = nil
	;----------------------------------------------------------------
	; get multipliers
	;----------------------------------------------------------------
	if(m1->m then
	    mult1 = m1->m
	else
	    mult1 = 1
	) 
	if(m2->m then
	    mult2 = m2->m
	else
	    mult2 = 1
	) 
	;----------------------------------------------------------------
	; get the length multipliers - this is so that the average length
	; can be calculated correctly
	;----------------------------------------------------------------
	if(m1->lm then
	    lmult1 = m1->lm
	else
	    lmult1 = 1
	) 
	if(m2->lm then
	    lmult2 = m2->lm
	else
	    lmult2 = 1
	) 
	;----------------------------------------------------------------
	; Combine widths - try to preserve multipliers if possible
	;----------------------------------------------------------------
	if(m1->W && m2->W then
	    if(m1->W == m2->W && m1->L == m2->L then
		mt->W = m1->W
		mt->m = mult1 + mult2
	    else
		mt->W = m1->W * mult1 + m2->W * mult2
		mt->m = 1
	    )
	)
	;----------------------------------------------------------------
	; Combine lengths
	;----------------------------------------------------------------
	when(m1->L && m2->L
	    mt->L = (m1->L * lmult1 + m2->L * lmult2) / (lmult1 + lmult2)
	    mt->lm = lmult1 + lmult2
	) 
	mt
    )
)

Note of course it means that you'd need to take into account the m factor in the comparison function - you could multiply W by m then. Or you could choose (Diva allows this) to reject combination of parallel devices which are not the same W and L. That's quite a good idea - and then you could also check that the m factors match between schematic and layout - it depends on how rigid you are about allowing folding of W into multiple fingers - for good analog layout, I would always say that you should not divide the W differently at layout time, because then delta-W effects mean that your layout doesn't really match the schematic, and that may mess up the behaviour of the design (for critical, matched transistor, circuits).

Regards,

Andrew.