VerilogA model with passive components in the transient analysis

Dear all,

I have a question and I'll appreciate any help.

I'm using Virtuoso to simulate a circuit containing many VerilogA models connected to  number of RC circuits, and current sources, the final output of the circuit is a voltage in a sigmoidal form, if I apply input 1 to the circuit the output should be + (positive part of the sigmoidal)  , for input 2 the output should be - (negative part of the sigmoidal), what I want to do is to apply the input then check the final output if the result is wrong I feedback the output to use it in the VerilogA model again to update some variables,  my question is how to set/ control the number of iterations in order for the simulation to stop once I get the correct output, in other words I'm seeing the whole circuit as one unit (VerilogA + passive components and sources) the input will pass the whole circuit then fedback to the verilogA models , this is count as a one iteration, so how to control that?

Thank you in advance,

Sali