VerilogA model with passive components in the transient analysis

Sali,

Your question isn't very clear - maybe some pictures might help?

Regards,

Andrew.

Hi Andrew,

Could you please tell me how to upload an image?

In the following sketch which is part of my circuit, the VerilogA block in the left side is generating a current Iout which becomes the input of the second part of the circuit, there is an equation inside the VerilogA block that measures a certain error inside an if statement, if that error > a certain value I increase/decrease the current Iout, then the Vout (final output in the right side )is fedback to that VerilogA block to repeat again the same error measurement, the simulation should be stopped once the error reaches a very small value for example 1e-50, how can I control that?

Thank you in advance,

Sali

Hi Sali,

It sounds like you just need to add an else condition to your check that increases/decreases your output current so that when the magnitude of your error signal is < 1e-50 (or whatever) the simulation stops.  You can use the $finish or $stop simulator control functions to accomplish this.

Regards,

TOM

Hi Tom,

Thank you so much for your reply, I will add one of those statements and check. I also need to know the number of iterations that the simulation will perform before it stops, since I will use it in some mathematical calculations, is there a way to record it, such adding a variable which increases until the simulation stops?

Thank you again,

Sali

Hi Sali,

You should be able to upload pictures using one of the Insert/Edit Media buttons in the rich text editor. However, I've found that sometimes it just doesn't work.

You also in theory should be able to drag and drop images into the text you are editing (in the rich text editor), but I've had problems with it too.

It's on my to-do list to follow this up with the IT team managing the forums when I have a moment (which won't be today, unfortunately).

Regards,

Andrew.

Dear all,

Regarding my previous question , all these blocks in the circuit are VerilogA blocks, I need the signal from the left side to pass through all the blocks to get the output in the right side, actually I have two data files inside the block , which is in the left side, I want to read the first file only to get the output in the right side then go back again to the same verilogA block in the left side to read the second file to get the output related to it, then I use both results to calculate a certain error, then use this error to increase/decrease some variables inside the block and repeat the same steps again until the error is minimized to a certain value, can I control the simulation to do that?

If not, is there a way to save the same circuit under another name and past it beside the original one and apply the second file as an input to it and change the relevant variables without affecting the same variables in the original circuit? or I should start to save as all the VerilogA blocks under another names first before start the simulation using this way? since the figure I attach is only a small portion of my big circuit.

I'll appreciate any help.

Thank you in advance,

Sali

It's still pretty unclear to me what you're really trying to achieve. If this is just a feedback circuit, I don't see what the big deal is - circuit simulators can handle solving sets of simultaneous nonlinear differential equations. The iteration count wouldn't be terribly useful in this case. If instead you want to have a number of discrete steps, it probably would make sense for your circuit to have feedback but that your circuit is synchronous (i.e. clocked) so that you can allow it to do whatever computation, have that settle, and then feed it back on the next clock cycle.

Of course, I may have completely misunderstood what you're doing, but I think that's hardly surprising given the rather hand-waving explanations of what you're doing.

Oh and if you have urgent questions, asking them (and then prompting again) in a community forum where everyone is answering in their spare time (even the Cadence folks such as me) is not the right place to do it. Go to customer support if you need timely response (although that tends to be more for tool related issues than design questions - it's unclear to me what type of question yours really is).

Regards,

Andrew.