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Model Card

analogy
analogy over 10 years ago

I have created a model card , but seems like ADE cannot plot output after simulation.Below is my ADE log:


Cadence (R) Virtuoso (R) Spectre (R) Circuit Simulator
Version 7.0.1.179.isr16 -- 15 Jan 2009
Copyright (C) 1989-2007 Cadence Design Systems, Inc. All rights reserved worldwide. Cadence, Virtuoso and Spectre are registered trademarks of Cadence Design Systems, Inc. All others are the property of their respective holders.

Protected by U.S. Patents: 5,610,847; 5,790,436; 5,812,431; 5,859,785; 5,949,992; 5,987,238; 6,088,523; 6,101,323; 6,151,698; 6,181,754; 6,260,176; 6,278,964; 6,349,272; 6,374,390; 6,493,849; 6,504,885; 6,618,837; 6,636,839; 6,778,025; 6,832,358; 6,851,097; 6,928,626; 7,024,652; 7,035,782; 7,085,700; 7,143,021.

Includes RSA BSAFE(R) Cryptographic or Security Protocol Software from RSA Security, Inc.

Simulating `input.scs' on [machine] at 5:16:35 PM, Wed Feb 18, 2015 (process id: 4606).
Command line:
    /apps/cadence/MMSIM0701179/tools.lnx86/spectre/bin/32bit/spectre  \
        input.scs +escchars +log ../psf/spectre.out +inter=mpsc  \
        +mpssession=spectre12_31805_2 -format sst2 -raw ../psf  \
        +lqtimeout 900 -maxw 5 -maxn 5
spectre pid = 4606

Loading /apps/cadence/MMSIM0701179/tools.lnx86/cmi/lib/5.0/libinfineon_sh.so ...
Loading /apps/cadence/MMSIM0701179/tools.lnx86/cmi/lib/5.0/libphilips_sh.so ...
Loading /apps/cadence/MMSIM0701179/tools.lnx86/cmi/lib/5.0/libsparam_sh.so ...
Loading /apps/cadence/MMSIM0701179/tools.lnx86/cmi/lib/5.0/libstmodels_sh.so ...
Using new Spectre Parser.

Notice from spectre during topology check.
    Only one connection to node `net4'.
Warning from spectre during initial setup.
    WARNING (SPECTRE-8281): `M0D' is not a node nor an instance name.
    WARNING (SPECTRE-8286): Ignoring invalid item `M0D' in save statement.


Circuit inventory:
              nodes 2
          capacitor 1     
            vsource 2     

Entering remote command mode using MPSC service (spectre, ipi, v0.0, spectre12_31805_2, ).

**************************************
DC Analysis `dc': V1:dc = (0 V -> 1 V)
**************************************
Important parameter values:
    reltol = 1e-03
    abstol(I) = 1 pA
    abstol(V) = 1 uV
    temp = 27 C
    tnom = 27 C
    tempeffects = all
    gmin = 1 pS
    dc: dc = 30 mV          (3 %), step = 10 mV           (1 %)
    dc: dc = 80 mV          (8 %), step = 10 mV           (1 %)
    dc: dc = 130 mV        (13 %), step = 10 mV           (1 %)
    dc: dc = 180 mV        (18 %), step = 10 mV           (1 %)
    dc: dc = 230 mV        (23 %), step = 10 mV           (1 %)
    dc: dc = 280 mV        (28 %), step = 10 mV           (1 %)
    dc: dc = 330 mV        (33 %), step = 10 mV           (1 %)
    dc: dc = 380 mV        (38 %), step = 10 mV           (1 %)
    dc: dc = 430 mV        (43 %), step = 10 mV           (1 %)
    dc: dc = 480 mV        (48 %), step = 10 mV           (1 %)
    dc: dc = 530 mV        (53 %), step = 10 mV           (1 %)
    dc: dc = 580 mV        (58 %), step = 10 mV           (1 %)
    dc: dc = 630 mV        (63 %), step = 10 mV           (1 %)
    dc: dc = 680 mV        (68 %), step = 10 mV           (1 %)
    dc: dc = 730 mV        (73 %), step = 10 mV           (1 %)
    dc: dc = 780 mV        (78 %), step = 10 mV           (1 %)
    dc: dc = 830 mV        (83 %), step = 10 mV           (1 %)
    dc: dc = 880 mV        (88 %), step = 10 mV           (1 %)
    dc: dc = 930 mV        (93 %), step = 10 mV           (1 %)
    dc: dc = 980 mV        (98 %), step = 10 mV           (1 %)
Total time required for dc analysis `dc' was 10 ms.

modelParameter: writing model parameter values to rawfile.
element: writing instance parameter values to rawfile.
outputParameter: writing output parameter values to rawfile.
designParamVals: writing netlist parameters to rawfile.
primitives: writing primitives to rawfile.
subckts: writing subcircuits to rawfile.

.Model Card created:

FinFET.scs (this is not a FinFET, only the filename is named "FinFET")

simulator lang=spectre
library FinFET

section tt
include "45nm.scs" section=45
endsection tt

endlibrary FinFET

45nm.scs

section 45

subckt nmos45 (d g s b);
//inline subckt nmos45 (d g s b);
model nch bsim4

//parameters
//+l=45e-9
//+w=120e-9
////+nf=1
//+factor=1
//+lef=l*factor
////+wef=n/nf*factor
//+wef=n*factor

//Technology parameters

+level = 54
+version = 4.0             binunit = 1               paramchk= 1               mobmod  = 0             
+capmod  = 2               igcmod  = 1               igbmod  = 1               geomod  = 1             
+diomod  = 1               rdsmod  = 0               rbodymod= 1               rgatemod= 1             
+permod  = 1               acnqsmod= 0               trnqsmod= 0             

+tref    = 27              toxe    = 1.8e-009        toxp    = 1.5e-009        toxm    = 1.8e-009      
+dtox    = 3e-010          epsrox  = 3.9             wint    = 5e-009          lint    = 0             
+ll      = 0               wl      = 0               lln     = 1               wln     = 1             
+lw      = 0               ww      = 0               lwn     = 1               wwn     = 1             
+lwl     = 0               wwl     = 0               xpart   = 0               toxref  = 1.8e-009      

+vth0    = 0.62261         k1      = 0.4             k2      = 0               k3      = 0             
+k3b     = 0               w0      = 2.5e-006        dvt0    = 1               dvt1    = 2             
+dvt2    = 0               dvt0w   = 0               dvt1w   = 0               dvt2w   = 0             
+dsub    = 0.1             minv    = 0.05            voffl   = 0               dvtp0   = 1e-010        
+dvtp1   = 0.1             lpe0    = 0               lpeb    = 0               xj      = 1.4e-008      
+ngate   = 1e+023          ndep    = 3.24e+018       nsd     = 2e+020          phin    = 0             
+cdsc    = 0               cdscb   = 0               cdscd   = 0               cit     = 0             
+voff    = -0.13           nfactor = 1.6             eta0    = 0.0125          etab    = 0             
+vfb     = -0.55           u0      = 0.049           ua      = 6e-010          ub      = 1.2e-018      
+uc      = 0               vsat    = 130000          a0      = 1               ags     = 0             
+a1      = 0               a2      = 1               b0      = 0               b1      = 0             
+keta    = 0.04            dwg     = 0               dwb     = 0               pclm    = 0.02          
+pdiblc1 = 0.001           pdiblc2 = 0.001           pdiblcb = -0.005          drout   = 0.5           
+pvag    = 1e-020          delta   = 0.01            pscbe1  = 8.14e+008       pscbe2  = 1e-007        
+fprout  = 0.2             pdits   = 0.08            pditsd  = 0.23            pditsl  = 2300000       
+rsh     = 5               rdsw    = 210             rsw     = 80              rdw     = 80            
+rdswmin = 0               rdwmin  = 0               rswmin  = 0               prwg    = 0             
+prwb    = 0               wr      = 1               alpha0  = 0.074           alpha1  = 0.005         
+beta0   = 30              agidl   = 0.0002          bgidl   = 2.1e+009        cgidl   = 0.0002        
+egidl   = 0.8             aigbacc = 0.012           bigbacc = 0.0028          cigbacc = 0.002         
+nigbacc = 1               aigbinv = 0.014           bigbinv = 0.004           cigbinv = 0.004         
+eigbinv = 1.1             nigbinv = 3               aigc    = 0.015211        bigc    = 0.0027432     
+cigc    = 0.002           aigsd   = 0.015211        bigsd   = 0.0027432       cigsd   = 0.002         
+nigc    = 1               poxedge = 1               pigcd   = 1               ntox    = 1             
+xrcrg1  = 12              xrcrg2  = 5             

+cgso    = 1.1e-010        cgdo    = 1.1e-010        cgbo    = 2.56e-011       cgdl    = 2.653e-010    
+cgsl    = 2.653e-010      ckappas = 0.03            ckappad = 0.03            acde    = 1             
+moin    = 15              noff    = 0.9             voffcv  = 0.02          

+kt1     = -0.11           kt1l    = 0               kt2     = 0.022           ute     = -1.5          
+ua1     = 4.31e-009       ub1     = 7.61e-018       uc1     = -5.6e-011       prt     = 0             
+at      = 33000         

+fnoimod = 1               tnoimod = 0             

+jss     = 0.0001          jsws    = 1e-011          jswgs   = 1e-010          njs     = 1             
+ijthsfwd= 0.01            ijthsrev= 0.001           bvs     = 10              xjbvs   = 1             
+jsd     = 0.0001          jswd    = 1e-011          jswgd   = 1e-010          njd     = 1             
+ijthdfwd= 0.01            ijthdrev= 0.001           bvd     = 10              xjbvd   = 1             
+pbs     = 1               cjs     = 0.0005          mjs     = 0.5             pbsws   = 1             
+cjsws   = 5e-010          mjsws   = 0.33            pbswgs  = 1               cjswgs  = 3e-010        
+mjswgs  = 0.33            pbd     = 1               cjd     = 0.0005          mjd     = 0.5           
+pbswd   = 1               cjswd   = 5e-010          mjswd   = 0.33            pbswgd  = 1             
+cjswgd  = 5e-010          mjswgd  = 0.33            tpb     = 0.005           tcj     = 0.001         
+tpbsw   = 0.005           tcjsw   = 0.001           tpbswg  = 0.005           tcjswg  = 0.001         
+xtis    = 3               xtid    = 3             

+dmcg    = 0               dmci    = 0               dmdg    = 0               dmcgt   = 0             
+dwj     = 0               xgw     = 0               xgl     = 0             

+rshg    = 0.4             gbmin   = 1e-010          rbpb    = 5               rbpd    = 15            
+rbps    = 15              rbdb    = 15              rbsb    = 15              ngcon   = 1             

ends nmos45

endsection 45

This is what my CDF and library decleration looks like:

When I run ADE simulation, all I get is a blank waveform window.Am I doing something wrong ?

Thanks.

 

 

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  • Andrew Beckett
    Andrew Beckett over 10 years ago

    analogy said:
    Notice from spectre during topology check.
        Only one connection to node `net4'.
    Warning from spectre during initial setup.
        WARNING (SPECTRE-8281): `M0D' is not a node nor an instance name.
        WARNING (SPECTRE-8286): Ignoring invalid item `M0D' in save statement.


    Circuit inventory:
                  nodes 2
              capacitor 1     
                vsource 2 

    You didn't say what you were trying to plot, nor show your input.scs (both of which are rather important bits of information) but the above part of the log file gives a good clue as to the problem. If you notice, there are no transistors in your circuit - only a capacitor and two voltage sources. This is because you have defined a subckt, with a model inside, but no instantiation of the model - you'd need an instance of the transistor.

    Typically you'd do:

    inline subckt nmos45 (d s g b)
    parameters w=1u l=1u  // and any other parameters that need to be passed in
    nmos45 (d s g b) nch w=w l=l
    model nch ...
    ends nmos45

    The benefit of making it an inline subckt is that you then can directly plot device parameters or access operating point data for the inline device (the device with the same instance name as the subckt name) as if the extra level of hierarchy didn't exist - without that, it gets more complicated. However,  this is only worth doing if you are doing some kind of transformation of the parameters passed in - if it's a direct mapping, you might as well dispense with the subckt wrapper altogether and simply define:

    model nmos45 bsim4 type=n ...

    and then in your top level circuit you can end up instantiating nmos45 directly with no need to have a subckt.

    I don't know what the "M0D" that it was trying to save was - but it's complaining about that too - maybe related to you instantiating an empty subckt?

    Regards,

    Andrew.

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  • analogy
    analogy over 10 years ago

    Okay, so this is what input.scs looks like :

    // Generated for: spectre
    // Generated on: Feb 13 16:21:48 2015
    // Design library name: FinFET
    // Design cell name: 45nm_tb
    // Design view name: schematic
    simulator lang=spectre
    global 0
    include "/home/sh/shah6834/st50/FinFETDependencies/finfetptm.scs"

    // Library name: FinFET
    // Cell name: 45nm_tb
    // View name: schematic
    M0 (net8 net1 0 net8) nmos45nm
    V0 (net1 0) vsource dc=500.0m type=dc
    V1 (net8 0) vsource dc=1.1 type=dc
    C0 (net8 0) capacitor c=1p
    simulatorOptions options reltol=1e-3 vabstol=1e-6 iabstol=1e-12 temp=27 \
    tnom=27 scalem=1.0 scale=1.0 gmin=1e-12 rforce=1 maxnotes=5 maxwarns=5 \
    digits=5 cols=80 pivrel=1e-3 sensfile="../psf/sens.output" \
    checklimitdest=psf
    dcOp dc write="spectre.dc" maxiters=150 maxsteps=10000 annotate=status
    dcOpInfo info what=oppoint where=rawfile
    dc dc dev=V1 param=dc start=0 stop=1.1 step=10m oppoint=rawfile \
    maxiters=150 maxsteps=10000 annotate=status
    modelParameter info what=models where=rawfile
    element info what=inst where=rawfile
    outputParameter info what=output where=rawfile
    designParamVals info what=parameters where=rawfile
    primitives info what=primitives where=rawfile
    subckts info what=subckts where=rawfile
    save M0:d
    saveOptions options save=allpub


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  • Andrew Beckett
    Andrew Beckett over 10 years ago

    In that case the changes I suggested should fix it.

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  • analogy
    analogy over 10 years ago
    Very well.I will try see if it's fixed.Thanks.
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  • analogy
    analogy over 10 years ago

    It seems that back in term mapping I didn't add nil D:\d... , this is what caused specter to generate M0D (I assume).

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