• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

  1. Community Forums
  2. Custom IC Design
  3. spectre says "The following branches form a loop of rigid...

Stats

  • Locked Locked
  • Replies 20
  • Subscribers 126
  • Views 24331
  • Members are here 0
This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

spectre says "The following branches form a loop of rigid branches "

eashwar g
eashwar g over 10 years ago

there is no connection to the particular node...which spectre is listing . i dont know why it keeps pointing out the error . please check this

Fatal error found by spectre during topology check.
    FATAL: The following branches form a loop of rigid branches (shorts) when added to the circuit:
        I16:w_position_flow (from state to 0)

but as per my circuit that connection is must .. so suggest possible solution


  • Cancel
  • eashwar g
    eashwar g over 10 years ago

    with the circuit as shown in fig1 it simulates without errors

    ill post the circuit which is showing errors in next comment

    • Cancel
    • Vote Up 0 Vote Down
    • Cancel
  • eashwar g
    eashwar g over 10 years ago

    in this fig ..i hav just used copied the above circuit ..so wen i start spectre simulation it says rigid loops error ..y is this happening with multiple circuits

    there is no connection between the 2 circuits ., then how come it starts up error .. please suggest some solution

    • Cancel
    • Vote Up 0 Vote Down
    • Cancel
  • Frank Wiedmann
    Frank Wiedmann over 10 years ago

    There are in fact many connections between the two circuits, because wires (and pins) labeled with the same name are connected.

    • Cancel
    • Vote Up 0 Vote Down
    • Cancel
  • Andrew Beckett
    Andrew Beckett over 10 years ago

    In addition to what Frank says, this message is telling you that you have multiple voltage (or potential) sources in parallel, and is a check that is done because there can be no solution to the equations in this case (think of having two ideal voltage sources with different potentials in parallel - what would the voltage across them actually be?)

    Regards,

    Andrew.

    • Cancel
    • Vote Up 0 Vote Down
    • Cancel
  • eashwar g
    eashwar g over 10 years ago
    thank u frank and Andrew for your advice .,i need to use both the sources for that component so i need to put those two sources one is inverted and other is non inverted input .,As per my design i am supposed to use both so please suggest some solution to this problem if i create a component with 3 pins a,b,c and i use that component twice as shown in figure ....will there be any issues i mean the second component with pins a,b,c accepts the same voltage and current as that of the first component. i hope you understand what I am trying to convey.. regards eashwar
    • Cancel
    • Vote Up 0 Vote Down
    • Cancel
  • Frank Wiedmann
    Frank Wiedmann over 10 years ago

    Use different names for the wire labels (and the pins) in the two parts of the circuit.

    • Cancel
    • Vote Up 0 Vote Down
    • Cancel
  • Andrew Beckett
    Andrew Beckett over 10 years ago
    No, I don't understand what you are trying to convey.
    • Cancel
    • Vote Up 0 Vote Down
    • Cancel
  • eashwar g
    eashwar g over 10 years ago
    thank u frank and Andrew for your advice .,i need to use both the sources for that component so i need to put those two sources one is inverted and other is non inverted input .,As per my design i am supposed to use both so please suggest some solution to this problem if i create a component with 3 pins a,b,c and i use that component twice as shown in figure ....will there be any issues i mean the second component with pins a,b,c accepts the same voltage and current as that of the first component. i hope you understand what I am trying to convey.. regards eashwar
    • Cancel
    • Vote Up 0 Vote Down
    • Cancel
  • eashwar g
    eashwar g over 10 years ago
    if we have a transistor with pins g,d,s 1) if i connect a voltage source to pin g and plot vi char 2)similarly in same schematic i create another transistor with same pins g,d,s and plot vi char will there be any issues 3)the problem is the component i created is in veriloga so for a current it would be I(p,n) if i have to change pin names then i have to modify whole code 4)this is the problem i am facing
    • Cancel
    • Vote Up 0 Vote Down
    • Cancel
  • eashwar g
    eashwar g over 10 years ago
    the problem is the component i created is in veriloga so for a current it would be I(p,n) if i have to change pin names then i have to modify whole code
    • Cancel
    • Vote Up 0 Vote Down
    • Cancel
>

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.

© 2025 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information