simInfo missing. Netlisting problem

Hi,

I'm using PVS for LVS'ing

I have some custom structures which required an addition to the ruledeck so that LVS recognised them, this works fine using the auCDL and auLVS settings in the PVS LVS (schematic input section) tool. I can LVS pretty much the whole chip using the auCDL setting, until I add the pads, something about them require the use of the createCDL setting. This is where the problem arises, when I try and LVS, I get a *Error*   Cell: xxxxx  in library: xxxxxx  is missing a simInfo.

Of course with this being a custom structure/component I've created there is no simulation info, and we have no intention of simulating the structure, we just want to verify the connections.

Ive tried setting the netlist mode to digital, but this doesn't work. I've checked that the netlist mode is digital.;

cdsGetNetlistMode()

"Digital"

I've also tried to add some terminal names to the simulation information section in the Edit CDF, but this didn't work - I wasn't 100% sure what I was doing, I added the pin name to the term order vox, and component name etc. This had no effect.

Can I copy a sim file from something else just to get it past LVS (the something else would need to only have 1 pin), Or do I have to write the shell of a simulation model or something, just to get it past this?