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Assura DRC errors - UMC 90nm

GURU M

Hello,
 I designed an inverter and has drawn a layout. After checking for Assura DRC errors, I got these errors. Please help me in solving these errors and how to waive the errors in Cadence.

[1] 4.1.1G. a: Minimum diffusion density over 150umX150um area, stepping 50um is 25%.

[3] 4.2.1. 1C: Minimum spacing and notch of metal-1 regions is 0.12um.

[1] 4.2.1.DEN.1G.M1_LT20: The Metal1 coverage must be larger than 20% over local 100um * 100um area step 50um.

[1] 4.2.1.DEN.1G.M2_LT20: The Metal2 coverage must be larger than 20% over local 100um * 100um area step 50um.

[1] 4.2.1.DEN.1G.M3_LT20: The Metal3 coverage must be larger than 20% over local 100um * 100um area step 50um.

[1] 4.2.1.DEN.1G.M4_LT20: The Metal4 coverage must be larger than 20% over local 100um * 100um area step 50um.

[1] 4.2.1.DEN.1G.M5_LT20: The Metal5 coverage must be larger than 20% over local 100um * 100um area step 50um.

[1] 4.2.1.DEN.1G.M6_LT20: The Metal6 coverage must be larger than 20% over local 100um * 100um area step 50um.

[1] 4.2.1.DEN.1G.M7_LT20: The Metal7 coverage must be larger than 20% over local 100um * 100um area step 50um.

[1] 4.2.1.DEN.1G.M8_LT20: The Metal8 coverage must be larger than 20% over local 100um * 100um area step 50um.

[1] 4.2.1.DEN.1G.M9_LT20: The Metal9 coverage must be larger than 20% over local 100um * 100um area step 50um.

[16] 5.1.DIFF: Die seal ring rule 1, diffusion must take a turn with 135-angle within regions 150um away from die corners.

[28] 5.1.ME1:Die seal ring rule 1, metal-1 must take a turn with 135-angle within regions 150um away from die corners.

[40] 6A.ME1_NSR: Die corner rule 1, ME1 must draw with 135 angle.

[2] 4.1.8AaBaC_DFM.Priority3: Minimum PO1 width for interconnect is 0.12um when PO1 to diffusion spacing > 0.2um

[28] 4.1.13C.a_DFM.Priority3: Minimum spacing of DIFF CONT to PO1 is 0.1um, PO1 with width < 0.13um

[4] 4.2.1.1D.b1b2_DFM.Priority4: Minimum ME1 line end enclosure of CONT at ME1 outer corner is 0.06um, Minimum ME1 line end enclosure of CONT for four sides is 0.02um, Minimum ME1 line end enclosure of CONT is 0.06um

[28] 4.1.13F_DFM.Priority5: Minimum extension of an DIFF region beyond a CONT region is 0.06um

[2] Design_guideline2: NWEL overlap PFET diffusion edge is recommended to be not less than 0.5um

Parents

  • Thank you Mr.Quek. I could get through those DRC errors. Now I am having trouble running LVS. Please help me solve this.

    *ERROR* Segmentation violation - run abnormally terminated

    *WARNING* Translation abnormally terminated!

    *WARNING* aveng exit with bad status
    *WARNING* Status 256
    *WARNING* Assura execution terminated



Reply

  • Thank you Mr.Quek. I could get through those DRC errors. Now I am having trouble running LVS. Please help me solve this.

    *ERROR* Segmentation violation - run abnormally terminated

    *WARNING* Translation abnormally terminated!

    *WARNING* aveng exit with bad status
    *WARNING* Status 256
    *WARNING* Assura execution terminated



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