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Problems in running BSIMCMG108.0.0 FinFET Models in Cadence Virtuoso

Manju bp

Hi,

 I am new to FinFETs. I need to design circuit using 32nm FinFET. I have downloaded BSIMCMG108.0.0 Files and used in Cadence Virtuoso version IC6.1.5-64b.500.11.  While compiling I am stuck with the following errors. 

Error found by spectre during AHDL read-in.
ERROR (VACOMP-2065): "/home/bhuvana/cadence_DB/scratch/varal/cadence/cadence_ms_labs_613/BSIMCMG108/PFin_fet/veriloga/bsimcmg_body.include", near line 4564: Encountered ddx operator in a conditional (if-else) statement. ddx operator cannot appear in a conditional (if-else) statement. Correct the problem and try again.
ERROR (VACOMP-1816): Exiting AHDL compilation.
ERROR (SFE-91): Error when elaborating the instance bsimcmg. Simulation should be terminated.

Can anyone please help me solving this problem?

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