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Error: Failed to elaborate("Library Name" "Cell Name" "config")

Casp
Casp over 10 years ago

Hi,

  I am using IC6.1.6 and trying to simulate extracted view using Hierarchy Editor. I am getting two errors.

   1.  Failed to load dynamic library libadsptolemy_vpi

   2.  Failed to elaborate ("Library Name" "Cell_name" "config")

Can you please tell me the possible reasons for this problem? I also have veriloga switch in the config view.

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  • VictorWu
    VictorWu over 4 years ago

    Did you solve  the problem?

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  • Andrew Beckett
    Andrew Beckett over 4 years ago in reply to VictorWu

    Victor,

    Which problem are you talking about? The original description was rather vague, so please provide details of what your actual issue is. Even the "elaboration" question was probably related to using an old AMS flow (cellview based netlisting) at a guess (since I don't know really what the issue was).

    Andrew

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  • VictorWu
    VictorWu over 4 years ago in reply to Andrew Beckett

    Andrew,

    It happened when I did postlayout simulation. The format of the output of PEX is Hspice, and I set the cell view to SPICE source file in the config. The version of  cadence is IC615 and the simulator is AMS, the NETLIST AND RUN MOD is Cellview-based netlister with ncvlog, ncelab, ncsim.

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  • VictorWu
    VictorWu over 4 years ago in reply to Andrew Beckett

    Andrew,

    It happened when I did postlayout simulation. The format of the output of PEX is Hspice, and I set the cell view to SPICE source file in the config. The version of  cadence is IC615 and the simulator is AMS, the NETLIST AND RUN MOD is Cellview-based netlister with ncvlog, ncelab, ncsim.

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  • Andrew Beckett
    Andrew Beckett over 4 years ago in reply to VictorWu

    That just looks as if you haven't provided the spectre models for the transistors via Setup->Model Libraries in ADE.

    By the way, it's not really a good idea to be using such an old version of the tools.

    Andrew

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  • VictorWu
    VictorWu over 4 years ago in reply to Andrew Beckett

    What spectre models should I provid and which way of postlayout simulation would you recommand. I would be very appreciate it.

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  • Andrew Beckett
    Andrew Beckett over 4 years ago in reply to VictorWu

    Presumably if you simulate anything with the transistors in, you'd need to provide spectre models for the transistors themselves. It's the same models you're using to do that - the models provided with your PDK (design kit) from the foundry.

    I'm not sure what you're asking when you ask "which way of post layout simulation would you recommend".

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  • VictorWu
    VictorWu over 4 years ago in reply to Andrew Beckett

    I can perform the pre-simulation with the model shown in the picture. I don't know why it is not working for the postlayout simulation. For "which way of post layout simulation would you recommend", I mean what tools should I use to perform the postlayout simulation, since that you told me "it's not really a good idea to be using such an old version of the tools."

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  • Andrew Beckett
    Andrew Beckett over 4 years ago in reply to VictorWu

    It's not obvious to me why it's not working if you providing the model files and the models contain models for the units it is complaining about. It's really hard to diagnose just by a screenshot of some of the error, so contacting support would be a better approach.

    However, given that you're using software that is between 9-10 years old (that's what I was pointing out as being a problem), our opportunities for support are quite limited. Why not use IC6.1.8? Then you can use the newer Unified Netlisting AMS flow which is a lot simpler in terms of PDK support.

    Andrew

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  • VictorWu
    VictorWu over 4 years ago in reply to Andrew Beckett

    Thank you for your relpy, it's really helpful.

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