Stats

  • Locked Locked
  • Replies 3
  • Subscribers 126
  • Views 16593
  • Members are here 0
This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

[Solved] MIM capacitor is not being recognized during LVS

Subrata

Hi,

I'm trying to layout a MIM capacitor wiith MT bottom plate, and AM top plate in IBM's 7RF 180nm process. Going through the design manuals, I've found the correct ways (including floating plates and/or tie downs) to connect the MIM cap to intended contacts and pins. Everything looks clean through DRC, however, LVS doesn't seem to recognize the capacitor at all.The cap is being generated using the foundry's pcell and has label on it.

I'm using IC616 and ASSURA41. If anyone has some advice, it'd be really helpful.

Thanks.

Parents

  • Hi Subrata

    The LVS deck should usually be able to extract the device if it is a pcell. This seems to be a case of mismatch between PDK and rule deck. It would be best to check with the foundry support.

    If Assura is completely unable to recognize the cap, it simply means that the mimcap recognition layer is not even being created. If the recognition layer is created but the cap is still not being used, you will get a malformed device error. But if you do not have any malformed device error, it means that no mimcap recognition layer has been detected. While it is possible for you to debug the LVS layers with the help of the VLW, I think it is not really necessary. It is best to just check with the foundry. : )

    Best regards
    Quek

Reply

  • Hi Subrata

    The LVS deck should usually be able to extract the device if it is a pcell. This seems to be a case of mismatch between PDK and rule deck. It would be best to check with the foundry support.

    If Assura is completely unable to recognize the cap, it simply means that the mimcap recognition layer is not even being created. If the recognition layer is created but the cap is still not being used, you will get a malformed device error. But if you do not have any malformed device error, it means that no mimcap recognition layer has been detected. While it is possible for you to debug the LVS layers with the help of the VLW, I think it is not really necessary. It is best to just check with the foundry. : )

    Best regards
    Quek

Children
No Data

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.