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Vth0 definition in scs file

BaaB

I am designing with library tsmcn65. I am having a problem understanding spectre circuit simulator  scs file. As you can see in the crn65gplus_2d5_lk_v1d0.scs or the image attached below, with a mosfet nch_na there are many Vth0 definitions.

So which one is used for normal simulation? How to choose or define it?
Are there some materials explaining about this?

Note from Moderator - Removed Image as it was sharing TSMC's IP which would have been in violation of your NDA with TSMC.

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  • Andrew Beckett

    I removed the screenshot because it was sharing TSMC's IP which I doubt you are authorised to do, and certainly we should not have it on a Cadence web site.

    The answer is that these are binned models - depending on the width and length of your transistors, they will fit into one of the bins formed by the wmin/wmax and lmin/lmax ranges in each of the numbered bins. Once it's determined that, it will use whichever model from that bin (and hence that vth0).

    Regards,

    Andrew.

Reply
  • Andrew Beckett

    I removed the screenshot because it was sharing TSMC's IP which I doubt you are authorised to do, and certainly we should not have it on a Cadence web site.

    The answer is that these are binned models - depending on the width and length of your transistors, they will fit into one of the bins formed by the wmin/wmax and lmin/lmax ranges in each of the numbered bins. Once it's determined that, it will use whichever model from that bin (and hence that vth0).

    Regards,

    Andrew.

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