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How can I generate schematic of standard cell using standard cell library data given by foundry in Virtuoso?

ADITYA56

I have done the following steps

1. I have created layout using gds and lef file from standard cell library using virtuoso by importing lef and gds.

2.I have also created symbol using cds.lib by assigning data from standard cell library

But now I want to generate schematic for timing simulation in virtuoso . 

Parents
  • Andrew Beckett

    I doubt the foundry data will include a device mapping file, but it's easy to create through the Device Map tab on the SPICE in form. For more details, hit the "Help" button at the bottom of the SPICE in form.

    Regards,

    Andrew.

  • Kian Boon
    in reply to Andrew Beckett

    Example:

    devSelect := nfet nmos2v
    propMatch := subtype N
    devSelect := pfet pmos2v
    propMatch := subtype P

    You may refer more by clicking the "Help" button at the bottom of the form.

Reply
  • Kian Boon
    in reply to Andrew Beckett

    Example:

    devSelect := nfet nmos2v
    propMatch := subtype N
    devSelect := pfet pmos2v
    propMatch := subtype P

    You may refer more by clicking the "Help" button at the bottom of the form.

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