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Model of fourier component in analogLib library

BaaB over 9 years ago

Could anyone provide me the model of fourier component in analogLib library in Cadence?

Thank you.

Parents

BaaB over 9 years ago

Thanks for your kindness.

Here are the netlist and spectre.out.

1. input.scs

// Generated for: spectre
// Generated on: Mar 21 08:39:18 2016
// Design library name: Huan
// Design cell name: CSAmp
// Design view name: schematic
simulator lang=spectre
global 0 vdd!
include "/root/Design6/Simulation_Efficiency/TSMC18/tsmc18rf/../models/spectre/rf018.scs" section=dio3
include "/root/Design6/Simulation_Efficiency/TSMC18/tsmc18rf/../models/spectre/rf018.scs" section=dio_dnw
include "/root/Design6/Simulation_Efficiency/TSMC18/tsmc18rf/../models/spectre/rf018.scs" section=dio
include "/root/Design6/Simulation_Efficiency/TSMC18/tsmc18rf/../models/spectre/rf018.scs" section=tt_rfres_sa
include "/root/Design6/Simulation_Efficiency/TSMC18/tsmc18rf/../models/spectre/rf018.scs" section=tt_rfmvar
include "/root/Design6/Simulation_Efficiency/TSMC18/tsmc18rf/../models/spectre/rf018.scs" section=tt_rfind
include "/root/Design6/Simulation_Efficiency/TSMC18/tsmc18rf/../models/spectre/rf018.scs" section=tt_rtmom
include "/root/Design6/Simulation_Efficiency/TSMC18/tsmc18rf/../models/spectre/rf018.scs" section=tt_bbmvar
include "/root/Design6/Simulation_Efficiency/TSMC18/tsmc18rf/../models/spectre/rf018.scs" section=tt
include "/root/Design6/Simulation_Efficiency/TSMC18/tsmc18rf/../models/spectre/rf018.scs" section=tt_rfesd
include "/root/Design6/Simulation_Efficiency/TSMC18/tsmc18rf/../models/spectre/rf018.scs" section=tt_mim
include "/root/Design6/Simulation_Efficiency/TSMC18/tsmc18rf/../models/spectre/rf018.scs" section=tt_rfrtmom
include "/root/Design6/Simulation_Efficiency/TSMC18/tsmc18rf/../models/spectre/rf018.scs" section=tt_rfres_hri
include "/root/Design6/Simulation_Efficiency/TSMC18/tsmc18rf/../models/spectre/rf018.scs" section=tt_rfres_rpo
include "/root/Design6/Simulation_Efficiency/TSMC18/tsmc18rf/../models/spectre/rf018.scs" section=tt_3vna
include "/root/Design6/Simulation_Efficiency/TSMC18/tsmc18rf/../models/spectre/rf018.scs" section=tt_m
include "/root/Design6/Simulation_Efficiency/TSMC18/tsmc18rf/../models/spectre/rf018.scs" section=tt_rfmos
include "/root/Design6/Simulation_Efficiency/TSMC18/tsmc18rf/../models/spectre/rf018.scs" section=tt_rfmim
include "/root/Design6/Simulation_Efficiency/TSMC18/tsmc18rf/../models/spectre/rf018.scs" section=tt_rfjvar
include "/root/Design6/Simulation_Efficiency/TSMC18/tsmc18rf/../models/spectre/rf018.scs" section=tt_3m
include "/root/Design6/Simulation_Efficiency/TSMC18/tsmc18rf/../models/spectre/rf018.scs" section=tt_res
include "/root/Design6/Simulation_Efficiency/TSMC18/tsmc18rf/../models/spectre/rf018.scs" section=tt_bip3
include "/root/Design6/Simulation_Efficiency/TSMC18/tsmc18rf/../models/spectre/rf018.scs" section=tt_bip
include "/root/Design6/Simulation_Efficiency/TSMC18/tsmc18rf/../models/spectre/rf018.scs" section=tt_3v
include "/root/Design6/Simulation_Efficiency/TSMC18/tsmc18rf/../models/spectre/rf018.scs" section=tt_rfmos33
include "/root/Design6/Simulation_Efficiency/TSMC18/tsmc18rf/../models/spectre/rf018.scs" section=tt_na
include "/root/Design6/Simulation_Efficiency/TSMC18/tsmc18rf/../models/spectre/rf018.scs" section=tt_rfsbd

// Library name: Huan
// Cell name: CSAmp
// View name: schematic
V0 (vdd! 0) vsource dc=1.8 type=dc
V1 (net1 0) vsource dc=600m mag=1m type=sine ampl=1m freq=1M
M0 (net7 net1 0 0) nch l=180n w=2u m=1 ad=9.6e-13 as=9.6e-13 pd=4.96u \
        ps=4.96u nrd=0.135 nrs=0.135
R0 (vdd! net7) resistor r=10K
FOUR0 (net7 0) fourier fund=10M harms=5
simulatorOptions options reltol=1e-3 vabstol=1e-6 iabstol=1e-12 temp=27 \
    tnom=27 scalem=1.0 scale=1.0 gmin=1e-12 rforce=1 maxnotes=5 maxwarns=5 \
    digits=5 cols=80 pivrel=1e-3 sensfile="../psf/sens.output" \
    checklimitdest=psf
tran tran stop=1m errpreset=moderate write="spectre.ic" \
    writefinal="spectre.fc" annotate=status maxiters=5
finalTimeOP info what=oppoint where=rawfile
modelParameter info what=models where=rawfile
element info what=inst where=rawfile
outputParameter info what=output where=rawfile
designParamVals info what=parameters where=rawfile
primitives info what=primitives where=rawfile
subckts info what=subckts where=rawfile
saveOptions options save=allpub

2. spectre.out

Cadence (R) Virtuoso (R) Spectre (R) Circuit Simulator
Version 13.1.1.049 64bit -- 15 Apr 2014
Copyright (C) 1989-2014 Cadence Design Systems, Inc. All rights reserved worldwide. Cadence, Virtuoso and Spectre are registered trademarks of Cadence Design Systems, Inc. All others are the property of their respective holders.

Includes RSA BSAFE(R) Cryptographic or Security Protocol Software from RSA Security, Inc.

User: root   Host: iclab   HostID: 7F0100   PID: 4413
Memory available: 2.9312 GB physical: 8.1514 GB
CPU Type: Intel(R) Core(TM) i5-3470 CPU @ 3.20GHz
          Processor PhysicalID CoreID Frequency Load
              0         0        0     1600.0    15.5
              1         0        1     1600.0    16.1
              2         0        2     1600.0    16.0
              3         0        3     3201.0    16.8

Simulating `input.scs' on iclab at 8:39:19 AM, Mon Mar 21, 2016 (process id: 4413).
Current working directory: /root/simulation/CSAmp/spectre/schematic/netlist
Environment variable:
    SPECTRE_DEFAULTS=-E
Command line:
    /usr/cadence/MMSIM131/tools/bin/spectre -64 input.scs +escchars \
        +log ../psf/spectre.out +inter=mpsc \
        +mpssession=spectre26_3883_141 -format psfxl -raw ../psf \
        +lqtimeout 900 -maxw 5 -maxn 5
spectre pid = 4413

Loading /usr/cadence/MMSIM131/tools.lnx86/cmi/lib/64bit/5.0/libinfineon_sh.so ...
Loading /usr/cadence/MMSIM131/tools.lnx86/cmi/lib/64bit/5.0/libphilips_o_sh.so ...
Loading /usr/cadence/MMSIM131/tools.lnx86/cmi/lib/64bit/5.0/libphilips_sh.so ...
Loading /usr/cadence/MMSIM131/tools.lnx86/cmi/lib/64bit/5.0/libsparam_sh.so ...
Loading /usr/cadence/MMSIM131/tools.lnx86/cmi/lib/64bit/5.0/libstmodels_sh.so ...
Reading file: /root/simulation/CSAmp/spectre/schematic/netlist/input.scs
Reading file: /usr/cadence/MMSIM131/tools.lnx86/spectre/etc/configs/spectre.cfg
Reading file: /root/Design6/Simulation_Efficiency/TSMC18/models/spectre/rf018.scs

Warning from spectre in `ndio_3', during circuit read-in.
    WARNING (SFE-2296): "/root/Design6/Simulation_Efficiency/TSMC18/tsmc18rf/../models/spectre/rf018.scs" 18628: The inline subckt definition `ndio_3' does not contain any inline components. The `inline' qualifier will therefore be ignored.
Warning from spectre in `pdio_3', during circuit read-in.
    WARNING (SFE-2296): "/root/Design6/Simulation_Efficiency/TSMC18/tsmc18rf/../models/spectre/rf018.scs" 18645: The inline subckt definition `pdio_3' does not contain any inline components. The `inline' qualifier will therefore be ignored.
Warning from spectre in `nwdio_3', during circuit read-in.
    WARNING (SFE-2296): "/root/Design6/Simulation_Efficiency/TSMC18/tsmc18rf/../models/spectre/rf018.scs" 18662: The inline subckt definition `nwdio_3' does not contain any inline components. The `inline' qualifier will therefore be ignored.
Warning from spectre in `endio_3', during circuit read-in.
    WARNING (SFE-2296): "/root/Design6/Simulation_Efficiency/TSMC18/tsmc18rf/../models/spectre/rf018.scs" 18679: The inline subckt definition `endio_3' does not contain any inline components. The `inline' qualifier will therefore be ignored.
Warning from spectre in `dnwpsub', during circuit read-in.
    WARNING (SFE-2296): "/root/Design6/Simulation_Efficiency/TSMC18/tsmc18rf/../models/spectre/rf018.scs" 18697: The inline subckt definition `dnwpsub' does not contain any inline components. The `inline' qualifier will therefore be ignored.
        Further occurrences of this warning will be suppressed.

Time for NDB Parsing: CPU = 337.949 ms, elapsed = 374.345 ms.
Time accumulated: CPU = 354.945 ms, elapsed = 374.35 ms.
Peak resident memory used = 52.4 Mbytes.

Reading link: /usr/cadence/MMSIM131/tools.lnx86/spectre/etc/ahdl/discipline.h
Reading file: /usr/cadence/MMSIM131/tools.lnx86/spectre/etc/ahdl/disciplines.vams
Reading link: /usr/cadence/MMSIM131/tools.lnx86/spectre/etc/ahdl/constants.h
Reading file: /usr/cadence/MMSIM131/tools.lnx86/spectre/etc/ahdl/constants.vams
Time for Elaboration: CPU = 23.996 ms, elapsed = 23.814 ms.
Time accumulated: CPU = 378.941 ms, elapsed = 398.339 ms.
Peak resident memory used = 58.2 Mbytes.

Time for EDB Visiting: CPU = 1 ms, elapsed = 469.923 us.
Time accumulated: CPU = 379.941 ms, elapsed = 398.973 ms.
Peak resident memory used = 58.6 Mbytes.

Global user options:
             reltol = 0.001
            vabstol = 1e-06
            iabstol = 1e-12
               temp = 27
               tnom = 27
             scalem = 1
              scale = 1
               gmin = 1e-12
             rforce = 1
           maxnotes = 5
           maxwarns = 5
             digits = 5
               cols = 80
             pivrel = 0.001
           sensfile = ../psf/sens.output
     checklimitdest = psf
               save = allpub

Circuit inventory:
              nodes 3
            bsim3v3 1
            fourier 1
           resistor 1
            vsource 2

Analysis and control statement inventory:
               info 7
               tran 1

Output statements:
             .probe 0
           .measure 0
               save 0

Notice from spectre.
    4 warnings suppressed.

Time for parsing: CPU = 1.999 ms, elapsed = 192.691 ms.
Time accumulated: CPU = 381.94 ms, elapsed = 591.798 ms.
Peak resident memory used = 59.5 Mbytes.

~~~~~~~~~~~~~~~~~~~~~~
Pre-Simulation Summary
~~~~~~~~~~~~~~~~~~~~~~
~~~~~~~~~~~~~~~~~~~~~~
Entering remote command mode using MPSC service (spectre, ipi, v0.0, spectre26_3883_141, ).

Warning from spectre.
    WARNING (SPECTRE-16707): Only tran supports psfxl format, result of other analyses will be in psfbin format.

***********************************************
Transient Analysis `tran': time = (0 s -> 1 ms)
***********************************************
DC simulation time: CPU = 0 s, elapsed = 447.035 us.
Important parameter values:
    start = 0 s
    outputstart = 0 s
    stop = 1 ms
    step = 1 us
    maxstep = 20 us
    ic = all
    useprevic = no
    skipdc = no
    reltol = 1e-03
    abstol(V) = 1 uV
    abstol(I) = 1 pA
    temp = 27 C
    tnom = 27 C
    tempeffects = all
    errpreset = moderate
    method = traponly
    lteratio = 3.5
    relref = sigglobal
    cmin = 0 F
    gmin = 1 pS

Output and IC/nodeset summary:
                 save   2       (current)
                 save   3       (voltage)

    tran: time = 25.08 us    (2.51 %), step = 83.33 ns    (8.33 m%)
    tran: time = 75 us        (7.5 %), step = 83.33 ns    (8.33 m%)
    tran: time = 125 us      (12.5 %), step = 83.33 ns    (8.33 m%)
    tran: time = 175 us      (17.5 %), step = 83.33 ns    (8.33 m%)
    tran: time = 225.1 us    (22.5 %), step = 83.33 ns    (8.33 m%)
    tran: time = 275.1 us    (27.5 %), step = 83.33 ns    (8.33 m%)
    tran: time = 325.1 us    (32.5 %), step = 83.33 ns    (8.33 m%)
    tran: time = 375.1 us    (37.5 %), step = 83.33 ns    (8.33 m%)
    tran: time = 425.1 us    (42.5 %), step = 83.33 ns    (8.33 m%)
    tran: time = 475.1 us    (47.5 %), step = 83.33 ns    (8.33 m%)
    tran: time = 525.1 us    (52.5 %), step = 83.33 ns    (8.33 m%)
    tran: time = 575 us      (57.5 %), step = 83.33 ns    (8.33 m%)
    tran: time = 625 us      (62.5 %), step = 83.33 ns    (8.33 m%)
    tran: time = 675 us      (67.5 %), step = 83.33 ns    (8.33 m%)
    tran: time = 725 us      (72.5 %), step = 83.33 ns    (8.33 m%)
    tran: time = 775 us      (77.5 %), step = 83.33 ns    (8.33 m%)
    tran: time = 825 us      (82.5 %), step = 83.33 ns    (8.33 m%)
    tran: time = 875 us      (87.5 %), step = 83.33 ns    (8.33 m%)
    tran: time = 925 us      (92.5 %), step = 83.33 ns    (8.33 m%)
    tran: time = 975 us      (97.5 %), step = 83.33 ns    (8.33 m%)
Number of accepted tran steps =             12180

~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Post-Transient Simulation Summary
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   -   To further speed up simulation, consider
          add ++aps on command line
          add +cktpreset=sampled on command line for ADC/DAC simulation
          add +cktpreset=pll on command line for PLL simulation
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

Initial condition solution time: CPU = 0 s, elapsed = 522.852 us.
Intrinsic tran analysis time:    CPU = 338.949 ms, elapsed = 389.999 ms.

========================
Fourier Analysis `FOUR0'
========================

Fundamental frequency = 10 MHz.
Fundamental period = 100 ns.

Fourier components of V(net7) for the interval from 999.9 us to 1 ms:
DC = 1.36938 V.

Harm: Absolute        Absolute        Relative        Relative
       Magnitude       Phase           Magnitude       Phase
   1: 857.287 uV     -92.8791 Deg     0.000 dB        0 Deg <- normalizer
   2: 425.329 uV     -92.9399 Deg    -6.088 dB       -60.8688 mDeg
   3: 283.211 uV     -93.6285 Deg    -9.620 dB       -749.429 mDeg
   4: 212.374 uV     -94.4755 Deg    -12.120 dB      -1.5964 Deg
   5: 169.935 uV     -95.3875 Deg    -14.057 dB      -2.50841 Deg
Total harmonic distortion = 67.5238 % (-3.41086 dB).
RMS value of computed spectrum (excluding DC) = 1.03443 mV.
RMS value of computed spectrum (including DC) = 1.36938 V.
Nonperiodicity (first/last point mismatch) = 2.66335 mV (310.671 %).

Total time required for tran analysis `tran': CPU = 341.949 ms, elapsed = 393.964 ms.
Time accumulated: CPU = 731.888 ms, elapsed = 1.18654 s.
Peak resident memory used = 62.4 Mbytes.

finalTimeOP: writing operating point information to rawfile.
modelParameter: writing model parameter values to rawfile.
element: writing instance parameter values to rawfile.
outputParameter: writing output parameter values to rawfile.
designParamVals: writing netlist parameters to rawfile.
primitives: writing primitives to rawfile.
subckts: writing subcircuits to rawfile.
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Reply

BaaB over 9 years ago

Thanks for your kindness.

Here are the netlist and spectre.out.

1. input.scs

// Generated for: spectre
// Generated on: Mar 21 08:39:18 2016
// Design library name: Huan
// Design cell name: CSAmp
// Design view name: schematic
simulator lang=spectre
global 0 vdd!
include "/root/Design6/Simulation_Efficiency/TSMC18/tsmc18rf/../models/spectre/rf018.scs" section=dio3
include "/root/Design6/Simulation_Efficiency/TSMC18/tsmc18rf/../models/spectre/rf018.scs" section=dio_dnw
include "/root/Design6/Simulation_Efficiency/TSMC18/tsmc18rf/../models/spectre/rf018.scs" section=dio
include "/root/Design6/Simulation_Efficiency/TSMC18/tsmc18rf/../models/spectre/rf018.scs" section=tt_rfres_sa
include "/root/Design6/Simulation_Efficiency/TSMC18/tsmc18rf/../models/spectre/rf018.scs" section=tt_rfmvar
include "/root/Design6/Simulation_Efficiency/TSMC18/tsmc18rf/../models/spectre/rf018.scs" section=tt_rfind
include "/root/Design6/Simulation_Efficiency/TSMC18/tsmc18rf/../models/spectre/rf018.scs" section=tt_rtmom
include "/root/Design6/Simulation_Efficiency/TSMC18/tsmc18rf/../models/spectre/rf018.scs" section=tt_bbmvar
include "/root/Design6/Simulation_Efficiency/TSMC18/tsmc18rf/../models/spectre/rf018.scs" section=tt
include "/root/Design6/Simulation_Efficiency/TSMC18/tsmc18rf/../models/spectre/rf018.scs" section=tt_rfesd
include "/root/Design6/Simulation_Efficiency/TSMC18/tsmc18rf/../models/spectre/rf018.scs" section=tt_mim
include "/root/Design6/Simulation_Efficiency/TSMC18/tsmc18rf/../models/spectre/rf018.scs" section=tt_rfrtmom
include "/root/Design6/Simulation_Efficiency/TSMC18/tsmc18rf/../models/spectre/rf018.scs" section=tt_rfres_hri
include "/root/Design6/Simulation_Efficiency/TSMC18/tsmc18rf/../models/spectre/rf018.scs" section=tt_rfres_rpo
include "/root/Design6/Simulation_Efficiency/TSMC18/tsmc18rf/../models/spectre/rf018.scs" section=tt_3vna
include "/root/Design6/Simulation_Efficiency/TSMC18/tsmc18rf/../models/spectre/rf018.scs" section=tt_m
include "/root/Design6/Simulation_Efficiency/TSMC18/tsmc18rf/../models/spectre/rf018.scs" section=tt_rfmos
include "/root/Design6/Simulation_Efficiency/TSMC18/tsmc18rf/../models/spectre/rf018.scs" section=tt_rfmim
include "/root/Design6/Simulation_Efficiency/TSMC18/tsmc18rf/../models/spectre/rf018.scs" section=tt_rfjvar
include "/root/Design6/Simulation_Efficiency/TSMC18/tsmc18rf/../models/spectre/rf018.scs" section=tt_3m
include "/root/Design6/Simulation_Efficiency/TSMC18/tsmc18rf/../models/spectre/rf018.scs" section=tt_res
include "/root/Design6/Simulation_Efficiency/TSMC18/tsmc18rf/../models/spectre/rf018.scs" section=tt_bip3
include "/root/Design6/Simulation_Efficiency/TSMC18/tsmc18rf/../models/spectre/rf018.scs" section=tt_bip
include "/root/Design6/Simulation_Efficiency/TSMC18/tsmc18rf/../models/spectre/rf018.scs" section=tt_3v
include "/root/Design6/Simulation_Efficiency/TSMC18/tsmc18rf/../models/spectre/rf018.scs" section=tt_rfmos33
include "/root/Design6/Simulation_Efficiency/TSMC18/tsmc18rf/../models/spectre/rf018.scs" section=tt_na
include "/root/Design6/Simulation_Efficiency/TSMC18/tsmc18rf/../models/spectre/rf018.scs" section=tt_rfsbd

// Library name: Huan
// Cell name: CSAmp
// View name: schematic
V0 (vdd! 0) vsource dc=1.8 type=dc
V1 (net1 0) vsource dc=600m mag=1m type=sine ampl=1m freq=1M
M0 (net7 net1 0 0) nch l=180n w=2u m=1 ad=9.6e-13 as=9.6e-13 pd=4.96u \
        ps=4.96u nrd=0.135 nrs=0.135
R0 (vdd! net7) resistor r=10K
FOUR0 (net7 0) fourier fund=10M harms=5
simulatorOptions options reltol=1e-3 vabstol=1e-6 iabstol=1e-12 temp=27 \
    tnom=27 scalem=1.0 scale=1.0 gmin=1e-12 rforce=1 maxnotes=5 maxwarns=5 \
    digits=5 cols=80 pivrel=1e-3 sensfile="../psf/sens.output" \
    checklimitdest=psf
tran tran stop=1m errpreset=moderate write="spectre.ic" \
    writefinal="spectre.fc" annotate=status maxiters=5
finalTimeOP info what=oppoint where=rawfile
modelParameter info what=models where=rawfile
element info what=inst where=rawfile
outputParameter info what=output where=rawfile
designParamVals info what=parameters where=rawfile
primitives info what=primitives where=rawfile
subckts info what=subckts where=rawfile
saveOptions options save=allpub

2. spectre.out

Cadence (R) Virtuoso (R) Spectre (R) Circuit Simulator
Version 13.1.1.049 64bit -- 15 Apr 2014
Copyright (C) 1989-2014 Cadence Design Systems, Inc. All rights reserved worldwide. Cadence, Virtuoso and Spectre are registered trademarks of Cadence Design Systems, Inc. All others are the property of their respective holders.

Includes RSA BSAFE(R) Cryptographic or Security Protocol Software from RSA Security, Inc.

User: root   Host: iclab   HostID: 7F0100   PID: 4413
Memory available: 2.9312 GB physical: 8.1514 GB
CPU Type: Intel(R) Core(TM) i5-3470 CPU @ 3.20GHz
          Processor PhysicalID CoreID Frequency Load
              0         0        0     1600.0    15.5
              1         0        1     1600.0    16.1
              2         0        2     1600.0    16.0
              3         0        3     3201.0    16.8

Simulating `input.scs' on iclab at 8:39:19 AM, Mon Mar 21, 2016 (process id: 4413).
Current working directory: /root/simulation/CSAmp/spectre/schematic/netlist
Environment variable:
    SPECTRE_DEFAULTS=-E
Command line:
    /usr/cadence/MMSIM131/tools/bin/spectre -64 input.scs +escchars \
        +log ../psf/spectre.out +inter=mpsc \
        +mpssession=spectre26_3883_141 -format psfxl -raw ../psf \
        +lqtimeout 900 -maxw 5 -maxn 5
spectre pid = 4413

Loading /usr/cadence/MMSIM131/tools.lnx86/cmi/lib/64bit/5.0/libinfineon_sh.so ...
Loading /usr/cadence/MMSIM131/tools.lnx86/cmi/lib/64bit/5.0/libphilips_o_sh.so ...
Loading /usr/cadence/MMSIM131/tools.lnx86/cmi/lib/64bit/5.0/libphilips_sh.so ...
Loading /usr/cadence/MMSIM131/tools.lnx86/cmi/lib/64bit/5.0/libsparam_sh.so ...
Loading /usr/cadence/MMSIM131/tools.lnx86/cmi/lib/64bit/5.0/libstmodels_sh.so ...
Reading file: /root/simulation/CSAmp/spectre/schematic/netlist/input.scs
Reading file: /usr/cadence/MMSIM131/tools.lnx86/spectre/etc/configs/spectre.cfg
Reading file: /root/Design6/Simulation_Efficiency/TSMC18/models/spectre/rf018.scs

Warning from spectre in `ndio_3', during circuit read-in.
    WARNING (SFE-2296): "/root/Design6/Simulation_Efficiency/TSMC18/tsmc18rf/../models/spectre/rf018.scs" 18628: The inline subckt definition `ndio_3' does not contain any inline components. The `inline' qualifier will therefore be ignored.
Warning from spectre in `pdio_3', during circuit read-in.
    WARNING (SFE-2296): "/root/Design6/Simulation_Efficiency/TSMC18/tsmc18rf/../models/spectre/rf018.scs" 18645: The inline subckt definition `pdio_3' does not contain any inline components. The `inline' qualifier will therefore be ignored.
Warning from spectre in `nwdio_3', during circuit read-in.
    WARNING (SFE-2296): "/root/Design6/Simulation_Efficiency/TSMC18/tsmc18rf/../models/spectre/rf018.scs" 18662: The inline subckt definition `nwdio_3' does not contain any inline components. The `inline' qualifier will therefore be ignored.
Warning from spectre in `endio_3', during circuit read-in.
    WARNING (SFE-2296): "/root/Design6/Simulation_Efficiency/TSMC18/tsmc18rf/../models/spectre/rf018.scs" 18679: The inline subckt definition `endio_3' does not contain any inline components. The `inline' qualifier will therefore be ignored.
Warning from spectre in `dnwpsub', during circuit read-in.
    WARNING (SFE-2296): "/root/Design6/Simulation_Efficiency/TSMC18/tsmc18rf/../models/spectre/rf018.scs" 18697: The inline subckt definition `dnwpsub' does not contain any inline components. The `inline' qualifier will therefore be ignored.
        Further occurrences of this warning will be suppressed.

Time for NDB Parsing: CPU = 337.949 ms, elapsed = 374.345 ms.
Time accumulated: CPU = 354.945 ms, elapsed = 374.35 ms.
Peak resident memory used = 52.4 Mbytes.

Reading link: /usr/cadence/MMSIM131/tools.lnx86/spectre/etc/ahdl/discipline.h
Reading file: /usr/cadence/MMSIM131/tools.lnx86/spectre/etc/ahdl/disciplines.vams
Reading link: /usr/cadence/MMSIM131/tools.lnx86/spectre/etc/ahdl/constants.h
Reading file: /usr/cadence/MMSIM131/tools.lnx86/spectre/etc/ahdl/constants.vams
Time for Elaboration: CPU = 23.996 ms, elapsed = 23.814 ms.
Time accumulated: CPU = 378.941 ms, elapsed = 398.339 ms.
Peak resident memory used = 58.2 Mbytes.

Time for EDB Visiting: CPU = 1 ms, elapsed = 469.923 us.
Time accumulated: CPU = 379.941 ms, elapsed = 398.973 ms.
Peak resident memory used = 58.6 Mbytes.

Global user options:
             reltol = 0.001
            vabstol = 1e-06
            iabstol = 1e-12
               temp = 27
               tnom = 27
             scalem = 1
              scale = 1
               gmin = 1e-12
             rforce = 1
           maxnotes = 5
           maxwarns = 5
             digits = 5
               cols = 80
             pivrel = 0.001
           sensfile = ../psf/sens.output
     checklimitdest = psf
               save = allpub

Circuit inventory:
              nodes 3
            bsim3v3 1
            fourier 1
           resistor 1
            vsource 2

Analysis and control statement inventory:
               info 7
               tran 1

Output statements:
             .probe 0
           .measure 0
               save 0

Notice from spectre.
    4 warnings suppressed.

Time for parsing: CPU = 1.999 ms, elapsed = 192.691 ms.
Time accumulated: CPU = 381.94 ms, elapsed = 591.798 ms.
Peak resident memory used = 59.5 Mbytes.

~~~~~~~~~~~~~~~~~~~~~~
Pre-Simulation Summary
~~~~~~~~~~~~~~~~~~~~~~
~~~~~~~~~~~~~~~~~~~~~~
Entering remote command mode using MPSC service (spectre, ipi, v0.0, spectre26_3883_141, ).

Warning from spectre.
    WARNING (SPECTRE-16707): Only tran supports psfxl format, result of other analyses will be in psfbin format.

***********************************************
Transient Analysis `tran': time = (0 s -> 1 ms)
***********************************************
DC simulation time: CPU = 0 s, elapsed = 447.035 us.
Important parameter values:
    start = 0 s
    outputstart = 0 s
    stop = 1 ms
    step = 1 us
    maxstep = 20 us
    ic = all
    useprevic = no
    skipdc = no
    reltol = 1e-03
    abstol(V) = 1 uV
    abstol(I) = 1 pA
    temp = 27 C
    tnom = 27 C
    tempeffects = all
    errpreset = moderate
    method = traponly
    lteratio = 3.5
    relref = sigglobal
    cmin = 0 F
    gmin = 1 pS

Output and IC/nodeset summary:
                 save   2       (current)
                 save   3       (voltage)

    tran: time = 25.08 us    (2.51 %), step = 83.33 ns    (8.33 m%)
    tran: time = 75 us        (7.5 %), step = 83.33 ns    (8.33 m%)
    tran: time = 125 us      (12.5 %), step = 83.33 ns    (8.33 m%)
    tran: time = 175 us      (17.5 %), step = 83.33 ns    (8.33 m%)
    tran: time = 225.1 us    (22.5 %), step = 83.33 ns    (8.33 m%)
    tran: time = 275.1 us    (27.5 %), step = 83.33 ns    (8.33 m%)
    tran: time = 325.1 us    (32.5 %), step = 83.33 ns    (8.33 m%)
    tran: time = 375.1 us    (37.5 %), step = 83.33 ns    (8.33 m%)
    tran: time = 425.1 us    (42.5 %), step = 83.33 ns    (8.33 m%)
    tran: time = 475.1 us    (47.5 %), step = 83.33 ns    (8.33 m%)
    tran: time = 525.1 us    (52.5 %), step = 83.33 ns    (8.33 m%)
    tran: time = 575 us      (57.5 %), step = 83.33 ns    (8.33 m%)
    tran: time = 625 us      (62.5 %), step = 83.33 ns    (8.33 m%)
    tran: time = 675 us      (67.5 %), step = 83.33 ns    (8.33 m%)
    tran: time = 725 us      (72.5 %), step = 83.33 ns    (8.33 m%)
    tran: time = 775 us      (77.5 %), step = 83.33 ns    (8.33 m%)
    tran: time = 825 us      (82.5 %), step = 83.33 ns    (8.33 m%)
    tran: time = 875 us      (87.5 %), step = 83.33 ns    (8.33 m%)
    tran: time = 925 us      (92.5 %), step = 83.33 ns    (8.33 m%)
    tran: time = 975 us      (97.5 %), step = 83.33 ns    (8.33 m%)
Number of accepted tran steps =             12180

~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Post-Transient Simulation Summary
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   -   To further speed up simulation, consider
          add ++aps on command line
          add +cktpreset=sampled on command line for ADC/DAC simulation
          add +cktpreset=pll on command line for PLL simulation
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

Initial condition solution time: CPU = 0 s, elapsed = 522.852 us.
Intrinsic tran analysis time:    CPU = 338.949 ms, elapsed = 389.999 ms.

========================
Fourier Analysis `FOUR0'
========================

Fundamental frequency = 10 MHz.
Fundamental period = 100 ns.

Fourier components of V(net7) for the interval from 999.9 us to 1 ms:
DC = 1.36938 V.

Harm: Absolute        Absolute        Relative        Relative
       Magnitude       Phase           Magnitude       Phase
   1: 857.287 uV     -92.8791 Deg     0.000 dB        0 Deg <- normalizer
   2: 425.329 uV     -92.9399 Deg    -6.088 dB       -60.8688 mDeg
   3: 283.211 uV     -93.6285 Deg    -9.620 dB       -749.429 mDeg
   4: 212.374 uV     -94.4755 Deg    -12.120 dB      -1.5964 Deg
   5: 169.935 uV     -95.3875 Deg    -14.057 dB      -2.50841 Deg
Total harmonic distortion = 67.5238 % (-3.41086 dB).
RMS value of computed spectrum (excluding DC) = 1.03443 mV.
RMS value of computed spectrum (including DC) = 1.36938 V.
Nonperiodicity (first/last point mismatch) = 2.66335 mV (310.671 %).

Total time required for tran analysis `tran': CPU = 341.949 ms, elapsed = 393.964 ms.
Time accumulated: CPU = 731.888 ms, elapsed = 1.18654 s.
Peak resident memory used = 62.4 Mbytes.

finalTimeOP: writing operating point information to rawfile.
modelParameter: writing model parameter values to rawfile.
element: writing instance parameter values to rawfile.
outputParameter: writing output parameter values to rawfile.
designParamVals: writing netlist parameters to rawfile.
primitives: writing primitives to rawfile.
subckts: writing subcircuits to rawfile.
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