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Assura LVS Error (Execution Terminated)

Sattar72

Hello,

Version: Cadence 6.1.5.

Technology & Process: GPDK180nm

Verification Check: Assura DRC, LVS

I am Working on Cadence 6.1.5 version. I have designed Double tail comparator. While i am running Assura LVS. In log file i am getting error in Extract Rule File (divaEXT.rul). In log file Error exist in rule file. That is given by Foundry. So i am providing log file can someone help me.

Thanks in Advance,

LVSDoubletailcomparator.log File:

Assura (tm) Physical Verification Version av4.1:Production:dfII6.1.4-64b:IC6.1.4-64b.500.10
Release 4.1_USR2_HF2

Copyright (c) Cadence Design Systems. All rights reserved.
@(#)$CDS: assura_64 version av4.1:Production:dfII6.1.4-64b:IC6.1.4-64b.500.10 01/19/2011 09:07 (sjfdl081) $
sub-version 4.1_USR2_HF2, integ signature 2011-01-19-0844

run on localhost.localdomain from /opt/cadence/ASSURA41OAISR_lnx86/tools.lnx86/assura/bin/64bit/assura on Mon May 2 16:10:35 2016


Starting /opt/cadence/ASSURA41OAISR_lnx86//tools/assura/bin/aveng /root/LVSDoubletailComparator/DoubletailComparator.rsf -exec1 -LVS -cdslib /root/cds.lib
@(#)$CDS: aveng_64 version av4.1:Production:dfII6.1.4-64b:IC6.1.4-64b.500.10 01/19/2011 09:08 (sjfdl081) $
sub-version 4.1_USR2_HF2, integ signature 2011-01-19-0844

run on localhost.localdomain from /opt/cadence/ASSURA41OAISR_lnx86/tools.lnx86/assura/bin/64bit/aveng on Mon May 2 16:10:35 2016

Summary Report: DoubletailComparator.sum
RSF : /root/LVSDoubletailComparator/DoubletailComparator.rsf
Library Name : AnalogSAS
CDSLIB Path : "/root/cds.lib"
Cell Name : DoubletailComparator
View Name : layout
Rules File : /root/libs.oa22/gpdk180/divaEXT.rul
Options : -exec1 -LVS -cdslib /root/cds.lib
Work Directory: /root/LVSDoubletailComparator
Operating Mode: Legacy Mode is Off


Starting dfIIToVdb...
Virtuoso Framework License (111) was checked out successfully. Total checkout time was 0.45s.
@(#)$CDS: dfIIToVdb_64 version av4.1:Production:dfII6.1.4-64b:IC6.1.4-64b.500.10 01/19/2011 09:09 (sjfdl081) $
sub-version 4.1_USR2_HF2, integ signature 2011-01-19-0844

run on localhost.localdomain from /opt/cadence/ASSURA41OAISR_lnx86/tools.lnx86/assura/bin/64bit/dfIIToVdb on Mon May 2 16:10:35 2016

Loading gpdk180/libInit.il ...
Loading gpdk180/loadCxt.ile ... done!
Loading context 'gpdk180' from library 'gpdk180' ... done!
Loading context 'pdkUtils' from library 'gpdk180' ... done!
Loading gpdk180/.cdsenv ... done!
Loading gpdk180/libInitCustomExit.il ...
*************************************************************
* Cadence Design Systems, Inc.                                          *
*                                                                                                  *
* Generic 180nm PDK                                                            *
* (gpdk180)                                                                               *
*                                                                                                   *
* Version 3.2                                                                              *
*                                                                                                    *
*************************************************************
done!
Loaded gpdk180/libInit.il successfully!
*WARNING* Cannot find /opt/cadence/ASSURA41OAISR_lnx86/tools.lnx86/dfII/etc/tools/spectre directory to load environment variables
Compiling rules...

info: geomErase is not supported in Assura.
1. geomErase("marker" "warning")
info: geomErase is not supported in Assura.
2. geomErase("marker" "error")
ERROR Unknown option 'voids' is found in geomHoles().
146. geomHoles(Nwell voids)
Errors exist in the rules file '/root/libs.oa22/gpdk180/divaEXT.rul'.


***** dfIIToVdb terminated abnormally *****

*WARNING* Translation abnormally terminated!


***** aveng fork terminated abnormally *****

*WARNING* aveng exit with bad status
*WARNING* Status 256
*WARNING* Assura execution terminated

Thanks & Regards
Sattar

Parents
  • Andrew Beckett

    Unknown said:
    Sorry, yes spectre is simulator for schematc. Actually what i am supposed to ask means if schematic is designed but i am not verified with spectre simulator or may be spectre file is missing. If I run LVS will it get results clean if i have done proper connections. I am posting log file please go through it

    I have no idea what you're asking here. If you're asking whether it's possible to get LVS clean results without having simulated the design, then the answer is of course yes - LVS is simply matching the connectivity between the schematic and an extraction of the layout. It knows nothing about whether you've simulated it or not.

    The log file doesn't tell me anything very useful - it just says that it managed to go through all the steps to run LVS. The LVS match report will be elsewhere. I can't write in this post a tutorial on how to run and debug Assura LVS - there should be enough on that in the documentation. Or you should speak to your supervisor - it sounds to me as if you don't really know what you're trying to do here...

    Regards,

    Andrew.

Reply
  • Andrew Beckett

    Unknown said:
    Sorry, yes spectre is simulator for schematc. Actually what i am supposed to ask means if schematic is designed but i am not verified with spectre simulator or may be spectre file is missing. If I run LVS will it get results clean if i have done proper connections. I am posting log file please go through it

    I have no idea what you're asking here. If you're asking whether it's possible to get LVS clean results without having simulated the design, then the answer is of course yes - LVS is simply matching the connectivity between the schematic and an extraction of the layout. It knows nothing about whether you've simulated it or not.

    The log file doesn't tell me anything very useful - it just says that it managed to go through all the steps to run LVS. The LVS match report will be elsewhere. I can't write in this post a tutorial on how to run and debug Assura LVS - there should be enough on that in the documentation. Or you should speak to your supervisor - it sounds to me as if you don't really know what you're trying to do here...

    Regards,

    Andrew.

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