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Create ideal buffer with verilogA

BaaB

Hi,

With the help of Andrew last time relating to dependent sources, yesterday I tried a similar approach to create an ideal buffer.

I tried it and tested. Everything is OK. However, I have some questions relating to the code. Could you help me clarify it?

Here is the code I used to create an ideal buffer:

subckt ibuff (in out gnd)
V1 (out gnd) bsource v=v(in,gnd)
ends ibuff


It works as expected. But how input impedance of infinity and zero output impedance is realized from the code?

I see that the ideal buffer has infinite input impedance and zero output impedance too

Parents

  • You could have just used a vcvs (voltage controlled voltage source) from analogLib to do this. Isn't it fairly obvious why this has infinite input impedance and zero output impedance? It is simply measuring the input voltage (it would draw no current) and then has an ideal voltage source at the output where the voltage just happens to be the measured input voltage - so there's no impedance included.

    Put another way, I don't really understand why you are unsure as to why this would have ideal behaviour?

    Regards,

    Andrew.

Reply

  • You could have just used a vcvs (voltage controlled voltage source) from analogLib to do this. Isn't it fairly obvious why this has infinite input impedance and zero output impedance? It is simply measuring the input voltage (it would draw no current) and then has an ideal voltage source at the output where the voltage just happens to be the measured input voltage - so there's no impedance included.

    Put another way, I don't really understand why you are unsure as to why this would have ideal behaviour?

    Regards,

    Andrew.

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