How to use PSS+PSTB or PSS+PAC to simulation the loop gain of the amplifier in the MDAC in each clock phases

Unknown said:

Hello Christian,
That problem is still unsolved. I agree with you that PSTB averages the loop gain during two phases. But as I have more works in the chopper amplifier, I think that the PSS+PSTB analysis may not suitable to measure the loop gain within a single phase. Because PHI1 and PHI2 are total two different phases. It's not like the case in chopping: chopping works in two clock phases but still the same loop same circuit. That's why you can find some articles talk about the PSS+PSTB method to simulate the loop gain of a DC-DC converter but seldom in Switched Capacitor (SC) circuit. For SC circuit, I only see the PSS+PSTB method in simulating the loop gain of SC common mode feedback (CMFB) circuit. Although SC-CMFB circuit is actually different in two clock phases (because the value of feedback capacitor is different), they are approximately the same loop and same circuit.
So If we really want to simulate the loop gain of the amplifier in the SC feedback. I think we can do something like what we do in SC-CMFB. But I did't try it before.
Yan

Interestingly I have the exact same problem. My circuit auto zeros on phase 1 and amplifies on phase 2. When I run a pstb sim using either the diffstbprobe probe or the cmdmprobe (I put it only in the autozero path since that's the worst case for stability)  I get an open loop gain less than 1 and it reports that the loop is unstable. I have compensated it by optimizing the step response so I know its probably got a phase margin around 60 degrees and a gain margin probably over 15dB but I haven't found a way to actually measure it. One problem I have is I'm using a switched capacitor feedback loop so I have to run for a few cycles to get it to stabilize so I can't run an ac type stability analysis. I've tried stripping out the common mode loop and replacing it with an ideal CMFB structure but that results don't make sense either. I suspect there is some interaction between the differential and common mode loops.

Andrew, you mentioned something about a way to run an AC analysis around a bias point set by a transient sim. Is that correct? If so, can you describe this method. Thanks for your help!

I suggest you contact customer support so we can actually look at your setup (and spend more time on it than I can, especially given upcoming vacation).

Running a stb analysis at a transient bias point is unlikely to give you a useful answer (because it's not the time-averaged loop gain you're observing, rather an instantaneous loop gain - assuming there even is an instance where the loop is closed). You do that simply by setting in the stb analysis and then on the transient analysis you specify acnames=stb and actimes=the time (or times) you want the stb analysis to be run at.

Regards,

Andrew.

Thanks Andrew. To clarify, you are saying that specifying the transient times in the stb analysis *will* work? I tried to run a transient right up until the end of phase 1 and then write a node set file. Then I had the stb sim read the node set. It did report that the loop was stable, but it gave an open loop gain of barely greater than 1. I'll try the method you suggested. Thanks!

I didn't say that. I said it would be unlikely to give you a useful answer, but it depends on the circuit. The setup is on the transient analysis options form - you define the times it runs the stb at, not the other way around:

However, the issue is whether you actually have a time during the period where the loop is closed and the loading is representative. Normally in a periodic circuit like this, only the time-averaged loop gain makes sense (which is what pstb computes). So that's why it may not necessarily make sense - and why I suggested contacting customer support so that an Application Engineer can take a look at your setup and see what's going on.

Regards,

Andrew.

I guess I'm not following. If I set the time to be right at the end of phase 1, why wouldn't the switches be guaranteed to be in the positions I want. The bias point should be exactly correct it seems to me and the loop gain should be calculated around that bias point no? I actually left on vacation myself and haven't had a chance to try that method but it can't hurt to try it when I get back. If that doesn't work I'll have my cad team contact Cadence Support. Thanks for your help.

Hi Andrew or Mike - was there any closure on this issue? I have a "simple" amp with an AZ (unity gain) phase and then a capacitive feedback phase (gain=Cin/Cf) - does the transient/stb method work for independent phases?

thanks, Neil.

Neil,

I can't answer your question - since I don't know what happened after my last append. I already explained why doing this with a switching feedback circuit may not make sense (i.e. looking at the loop gain at an instantaneous bias point if there is no feedback loop at that time).

Andrew

For the record, running an stb analysis at transient bias points based towards the end of each phase *seems* to give me sensible results....however, as you have pointed out above, this gives an instantaneous loop gain and not 'time-averaged'. (Also, as stated above, the auto-zero AZ path is giving wc results for PM, the probe is on the output of the amp).

Neil.