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Can i make the design rule check blind to a specific layer?

samer1

I am incorporating a device (memrsitor) in my layout that is not defined in the kit. I was thinking of representing the device by a layer that is not used in my design. However, this layer will have its own design rules that are different from the ones I want to set for my memristor?

So, I was thinking of using a layer that does not affect affect the DRC tool (the DRC does not show an error no matter where it is placed) or make the tool ignore the design rules for a specific layer and use that layer to represent the memristor. Is that even possible?

Any thoughts on that issue will be appreciated. 

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  • samer1
    ah Ok. Got you. Exactly that is what I was getting at. So, is there an easy way to create a layer without messing up the kit (that is why I put my other question regarding making a copy of the kit). But if I can just create a custom layer for myself that does not bring about much hassle, I can just do it right away.

    Thanks Andrew
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  • samer1
    ah Ok. Got you. Exactly that is what I was getting at. So, is there an easy way to create a layer without messing up the kit (that is why I put my other question regarding making a copy of the kit). But if I can just create a custom layer for myself that does not bring about much hassle, I can just do it right away.

    Thanks Andrew
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