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  3. Cadence Liberate: Path delays all zero in exported of verilog...

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Cadence Liberate: Path delays all zero in exported of verilog models

marten
marten over 8 years ago

Hi there,

I characterized custom cells for different corners and now want to create a verilog model for each corner. Although timings in the *.lib-file are totally different, path delay in all verilog models stay zero.
Here are the steps I did to create the models:

liberate > read_library lib/SUBVT28CORE_1.0_1.0_0_0_25_ecsm.lib

Command line arguments: none.
ALTOSHOME set to '/sct/homes3/cadence/liberate-15.14hf070'.
Server ID : T20170228092209088037S0008335
liberate > read_library lib/SUBVT28CORE_1.0_1.0_0_0_25_ecsm.lib
Reading 'lib/SUBVT28CORE_1.0_1.0_0_0_25_ecsm.lib' ...
//LIBERATE parameter "enable_command_history" set to "0"
LIBERATE parameter "slew_lower_rise" set to "0.3"
LIBERATE parameter "slew_lower_fall" set to "0.3"
LIBERATE parameter "slew_upper_rise" set to "0.7"
LIBERATE parameter "slew_upper_fall" set to "0.7"
LIBERATE parameter "measure_slew_lower_rise" set to "0.3"
LIBERATE parameter "measure_slew_lower_fall" set to "0.3"
LIBERATE parameter "measure_slew_upper_rise" set to "0.7"
LIBERATE parameter "measure_slew_upper_fall" set to "0.7"
LIBERATE parameter "delay_inp_rise" set to "0.5"
LIBERATE parameter "delay_inp_fall" set to "0.5"
LIBERATE parameter "delay_out_rise" set to "0.5"
LIBERATE parameter "delay_out_fall" set to "0.5"
Library read successfully.
1

liberate > write_verilog my.v
Writing Verilog to my.v
Writing Verilog for cell INV_X1

Looking at my.v gives:

// type:  
`timescale 1ns/10ps
`celldefine
module INV_X1 (Z, A);
        output Z;
        input A;

        // Function
        not (Z, A);

        // Timing
        specify
                (A => Z) = 0;
        endspecify
endmodule
`endcelldefine

Instead of the timing specification, I would expect something like this (example from 65nm lib):

   specify
     // delay parameters
     specparam
       tpllh$A$Z = 97:97:97,
       tphhl$A$Z = 74:74:74;

     // path delays
     (A *> Z) = (tpllh$A$Z, tphhl$A$Z);

   endspecify

Why does liberate skip the timing annotation?  Am I missing out some necessary configuration?

Thanks in advance and best regards,
Marten

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  • Andrew Beckett
    Andrew Beckett over 8 years ago

    Are you part of the Europractice scheme? If so, you can get support via Europractice. If you're not part of Europractice, then usually support can be channelled via your contact point within your University. Some details can be found at:

    I don't spend that much time on Liberate myself, so I'd have to sit down and research this in more detail; because I answer questions in here in my spare time, and I really don't have any this week, I don't have the bandwidth to research and answer your question (if it had been something I could answer quickly, I would have done that already). Maybe somebody else will be able to, but we don't get a great number of Liberate questions on the forums...

    Regards,

    Andrew.

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  • Andrew Beckett
    Andrew Beckett over 8 years ago

    Are you part of the Europractice scheme? If so, you can get support via Europractice. If you're not part of Europractice, then usually support can be channelled via your contact point within your University. Some details can be found at:

    I don't spend that much time on Liberate myself, so I'd have to sit down and research this in more detail; because I answer questions in here in my spare time, and I really don't have any this week, I don't have the bandwidth to research and answer your question (if it had been something I could answer quickly, I would have done that already). Maybe somebody else will be able to, but we don't get a great number of Liberate questions on the forums...

    Regards,

    Andrew.

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