phase noise sim for driven circuit with non-ideal input

My question is similar to the one in the following thread

https://community.cadence.com/cadence_technology_forums/f/38/t/33153

I also read some other posts on jitter and phase noise sim, but still could not get an clear answer.

Below is what I want to know:

I have a very good clk source (say a TCXO). It is very good but still has some specified phase noise, like -140 dBc at 1kHz offset, -150 at 10kHz offset, etc. Now I added a bunch of buffers to this clk input, which will degrade the phase noise, and I want to know how much the phase noise is degraded, or what phase noise I can get at the output of those buffers.

The way I am trying it right now is to use pss+pnoise, and choose noise type=jitter (PM jitter for driven circuit). After simulation is done, I can plot Jee over a certain frequency offset range and then calculate PN using db20(Jee*2*pi*fin). In order to make things simple, I created the following test bench, just a input a source, plus a small load cap.

Now the question comes:

1. What kind of input port should I use? I can use a port and sine wave input, then I can specify the noise in noise/freq pairs (in dBc/Hz). This way, if I use noise type=source, I can plot phase noise after the simulation is done, and the phase noise at vout is the same (dBc/Hz) as I specified in the port. But if I choose noise type=jitter and calculate the phase noise by  db20(Jee*2*pi*fin), I get much worse results, 8 to 20 dB worse, depending on offset frequency. This confuses me.

2. By reading the manuals and application notes, I found that Jee for driven circuits, using noise type=jitter, is the jitter of the circuit, assuming an ideal input source, with an ideal zero-crossing. What if my input source is not ideal and has certain noise in it, how can I estimate the total phase noise at the output of the circuit?

3. If I want to use a pulse input (square wave), then I can not specify the relative phase noise as dBc/Hz, I can only specify noise power as V2/Hz at different offset. How to translate the dBc/Hz spec that I have for the input clk to the noise power to be used in the input port in the simbench is another thing that confuses me. This is also related to question 1.

4. In short, should I use noise type=jitter or noise type=source for my simulation? What kind of input source should I use and how do I specify the phase noise of the input source?

Many thanks!

Gang