Stats

Locked Locked
Replies 3
Subscribers 126
Views 16938
Members are here 0

This discussion has been locked.

You can no longer post new replies to this discussion. If you have a question you can start a new discussion

guide needed for simulating the circuit with script

hello, guys,

I used to simulate the analog circuit by clicking the GUI provided by IC616 and mmsim14. I find it's such a burden to simulate the same circuit for so many times. for example, if I design a specified OTA including only 9 mosfets and 2 capacitors. I have to adjust the dimensions for uncountable times to find good ones, especial for a optimal one(e.g noise optimation).

Now I want to do this in an automated way. I want to write the scripts in order to let the program calculating the proper bias voltage and mosfet and passive elements dimensions for me with the optimization method I give. Here is problem: where can I find the materials that could guide me to learn the scripts language(I know there is pspice)? I hope this language could allow me to call the simulator(like mmsim14) to do the needed simulation such as DC AC STB PSS etc.... and return the simulated results to the specified directories. and then I could transfer these results to the python scripts that I write to find the optimal values. Or a better situation is I could use the functions(e.g: find the maximum point of a simulated line such as gm/ID line or find the point corresponding to maximum slope rate) provided by the IC616 Platform(I believe it's exist in the waveform tools, but how do I call these functions?) instead of using the python scripts. For a single simulation, maybe the result is not the optimal one, so I need to call the simulator to do the former simulation again if the current values don't meet my targets values until I find the optimal one( the ones that meet my targets values).

I have the systemic design methodology. Could anyone give me some links(including the RAK or documents) or the name of the pdfs in the IC616 doc files which could guide me to learn the appropriate language to describe the detailed circuits and call the ADE simulator and do the Loop to find the target values?

forget to mention: I use tsmc technology so I do have all the model files used by spectre.

thans in advance!

Parents

rockyicer over 8 years ago

Dear Andrew Beckett:

thanks for your help. I am using the TSMC65nm_gp technology and the model uses BSIM4.5 version. Now I need to know the small signal equivalent circuit(SSEC) coresponding to the standrad 1.2V nch/pch(it's a regular digital mosfet not RF mos). the soft is IC616 and MMSIM141

I almost find every doc that I could access and find the equivalent circuit for bsim4 below at $MMSIMHOME/doc/spectremod/spectremod.pdf page 1250:

After I simulated the dc operation, I could read the model parameter like this:

signal OP("/M0" "??")

beff 22.98m
betaeff 14.4m

-b------------------------------
cbb 2.198f Total bulk capacitance intrinsic, overlap and fringing components

cbd -6.257a
cbdbo -6.257a

cbg -2.724f
cbgbo -2.724f

cbs 532.2a
cbsbo 532.2a
---------------------------- -----

-d-----------------------------------
cdb -5.267a

cdd 1.25f Total drain capacitance intrinsic, overlap and fringing components
cddbo 22.14a

cdg -1.264f
cdgbo -36.51a

cds 19.64a
cdsbo 19.64a
-------------------------------------

-g------------------------------------
cgb -363.1a

cgd -1.234f
cgdbo -6.279a

cgg 17.26f Total gate capacitance intrinsic, overlap and fringing components
cggbo 14.79f

cgs -15.66f
cgsbo -14.42f CGSBO = -dQg/dVs intrinsic gate-to-source capacitance
-------------------------------------

-s---------------------------------
csb -1.83f Intrinsic source-to-bulk capacitance
csd -9.606a Total source-to-drain capacitance cds 19.64a
csg -13.27f
css 15.11f Total source capacitance intrinsic, overlap and fringing components
--------------------------------- -

-----Junction diode model parameters

cjd 1.872f Zero bias drain bottom junction capacitance per unit area.
cjs 3.605f

-----------------overlap cap
covlgb 0
covlgd 1.227f
covlgs 1.239f

I can't find the corresponding cds/cdsbo(such as cdsi) in the above small signal equivalent circuit(SSEC). but I think the SSEC should include cds which is quite important.

And also, cjd stand for Zero bias drain bottom junction capacitance per unit area. but the voltage across the drain and bottom(bulk terminal) is not Zero. how could I evaluate the real drain bottom junction capacitance since the dc operation info don't give me other information?

so I wonder if I find the right SSEC? if not, please tell me where I can find the right SSE circuit that could match the dc operation information.
Cancel
Vote Up 0 Vote Down

Cancel

Reply

rockyicer over 8 years ago

Dear Andrew Beckett:

thanks for your help. I am using the TSMC65nm_gp technology and the model uses BSIM4.5 version. Now I need to know the small signal equivalent circuit(SSEC) coresponding to the standrad 1.2V nch/pch(it's a regular digital mosfet not RF mos). the soft is IC616 and MMSIM141

I almost find every doc that I could access and find the equivalent circuit for bsim4 below at $MMSIMHOME/doc/spectremod/spectremod.pdf page 1250:

After I simulated the dc operation, I could read the model parameter like this:

signal OP("/M0" "??")

beff 22.98m
betaeff 14.4m

-b------------------------------
cbb 2.198f Total bulk capacitance intrinsic, overlap and fringing components

cbd -6.257a
cbdbo -6.257a

cbg -2.724f
cbgbo -2.724f

cbs 532.2a
cbsbo 532.2a
---------------------------- -----

-d-----------------------------------
cdb -5.267a

cdd 1.25f Total drain capacitance intrinsic, overlap and fringing components
cddbo 22.14a

cdg -1.264f
cdgbo -36.51a

cds 19.64a
cdsbo 19.64a
-------------------------------------

-g------------------------------------
cgb -363.1a

cgd -1.234f
cgdbo -6.279a

cgg 17.26f Total gate capacitance intrinsic, overlap and fringing components
cggbo 14.79f

cgs -15.66f
cgsbo -14.42f CGSBO = -dQg/dVs intrinsic gate-to-source capacitance
-------------------------------------

-s---------------------------------
csb -1.83f Intrinsic source-to-bulk capacitance
csd -9.606a Total source-to-drain capacitance cds 19.64a
csg -13.27f
css 15.11f Total source capacitance intrinsic, overlap and fringing components
--------------------------------- -

-----Junction diode model parameters

cjd 1.872f Zero bias drain bottom junction capacitance per unit area.
cjs 3.605f

-----------------overlap cap
covlgb 0
covlgd 1.227f
covlgs 1.239f

I can't find the corresponding cds/cdsbo(such as cdsi) in the above small signal equivalent circuit(SSEC). but I think the SSEC should include cds which is quite important.

And also, cjd stand for Zero bias drain bottom junction capacitance per unit area. but the voltage across the drain and bottom(bulk terminal) is not Zero. how could I evaluate the real drain bottom junction capacitance since the dc operation info don't give me other information?

so I wonder if I find the right SSEC? if not, please tell me where I can find the right SSE circuit that could match the dc operation information.
Cancel
Vote Up 0 Vote Down

Cancel

Children

No Data

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.