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  3. error in checking lvs test with calibre tool

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error in checking lvs test with calibre tool

salar1991
salar1991 over 7 years ago

hi i'm trying to apply lvs test to the layout of my circuit that is a transimpedance amplifier which uses 4 spiral inductors .the problem is when i try to check lvs it gives me the  following errors :

no matching

".SUBCKT" statement for "SPIRAL_STD"

  source can not be read

what should i do to solve this i already read some forums that i added below but still didn't figure out  what to do. thanks in advance.

https://community.cadence.com/cadence_technology_forums/f/custom-ic-skill/21424/for-lvs-how-to-include-initiate-a-spice-netlist-into-a-schematic

community.cadence.com/.../tip-of-the-week-how-to-simulate-a-subcircuit-netlist-with-spectre-in-ade

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  • Andrew Beckett
    Andrew Beckett over 7 years ago

    The second link is really related to including SPICE SUBCKTs for simulation purposes - and the first is how to include them in the CDL netlist in the first place. I suspect however what you need is a means to include a fixed CDL netlist (for some of the fixed cells) in the LVS. That's more of a Calibre question - which is a Siemens Mentor product - so this is not the best place to ask that.

    Regards,

    Andrew.

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  • salar1991
    salar1991 over 7 years ago in reply to Andrew Beckett
    My problem has been resolved . it was because of netlist file . in the lvs tool i went to inputs menu and then i selected netlist and then i added this address to the files /usr/local/IC614/tsmc13/techFile/Calibre_LVS/source_added.RF_12_25_FSG

    my cadence version is  6.14 .i hope this is helpfull for somebody who has the same error.

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