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Simulation for Ferroelectric Capacitor (Based on VerilogA model) for C-V curve

Hi,
I have created a Ferroelectric Varactor model using VerilogA. Now, I wan to simulate the C-V curve. I have added a voltage source with the varactor with AC magnitude of 1. Now for ac analysis, I swept across dc voltage along which I want to plot the capacitance. I have selected current to be plotted of my device. Now how can I convert it to capacitance? At what frequency should i put for analysis frequency poit? Can anyone help to setup in ADE to simulate C-V curve?

I am using Cadence Virtuoso with spectre simulator.
Version: ICADV12.3-64b.500.21

I have attached my ADE and testbench screenshot.

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Andrew Beckett over 6 years ago

The same question has been asked (presumably by you, since the pictures look rather similar) and are being answered over on the Designer's Guide forum - here: http://www.designers-guide.org/Forum/YaBB.pl?num=1543487056

Andrew.
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Andrew Beckett over 6 years ago

The same question has been asked (presumably by you, since the pictures look rather similar) and are being answered over on the Designer's Guide forum - here: http://www.designers-guide.org/Forum/YaBB.pl?num=1543487056

Andrew.
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Piash over 6 years ago in reply to Andrew Beckett

Yeah... I found out the problem it was in my verilogA code of unit conversion problem which was stupid to find out. But anyway, I figured it out Thanks. Should I delete the post here?
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Andrew Beckett over 6 years ago in reply to Piash

Piash said:
Should I delete the post here?

No - best to leave it in case anyone else has a related issue or is interested - they can then follow the links over to the Designer's Guide site.

Regards,

Andrew
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